Thomas Schmoeller

Efficient simulation of light diffraction from three-dimensional EUV masks using field decomposition techniques

As the opportunities for experimental studies are still limited, a predictive simulation os EUV lithography is very important for a better understanding of the technology. One of the most critical issues in modeling of EUV lithography is the description of the mask. Typical absorber heights in the range between 80 and 100nm are more than 5 times larger than the wavelength of the used EUV radiation. Therefore, it is virtually impossible to perform parameter studies for 3D EUV masks, such as arrays of contacts or posts, with nowadays standard computers by straightforward application of finite-difference time-domain (FDTD) algorithms, which are used for the rigorous electromagnetic field simulatin of optical masks. This paper discusses the application of field decompsition techniques for an efficient simulation of 3D EUV-masks with FDTD algorithms. Comparisons with full 3D simulations are used to evaluate the accuracy and the performance of the proposed approach. The application of the new QUASI 3D rigorous electromagnetic field simulation for EUV masks reduces memory requirements and computing time by a factor of at least 100. The implemented simulation appraohc is applied for a first exploration of mask induced imaging artifacts such as placement errors, telecentricity errors, Bossung asymmetries, and focus shifts for 3D EUV masks.

Shadowing effect modeling and compensation for EUV lithography

Extreme ultraviolet (EUV) lithography is one of the leading technologies for 16nm and smaller node device patterning. One patterning issue intrinsic to EUV lithography is the shadowing effect due to oblique illumination at the mask and mask absorber thickness. This effect can cause CD errors up to a few nanometers, consequently needs to be accounted for in OPC modeling and compensated accordingly in mask synthesis. Because of the dependence on the reticle field coordinates, shadowing effect is very different from the traditional optical and resist effects. It poses challenges to modeling, compensation, and verification that were not encountered in tradition optical lithography mask synthesis. In this paper, we present a systematic approach for shadowing effect modeling and model-based shadowing compensation. Edge based shadowing effect calculation with reticle and scan information is presented. Model calibration and mask synthesis flows are described. Numerical experiments are performed to demonstrate the effectiveness of the approach.

EUV pattern shift compensation strategies

EUV lithography is one of the hot candidates for the 22nm node. A well known phenomenon in EUV lithography is the impact of non-telecentricity and the mask topography on printing performance. Due to oblique illumination of the mask, layout, the printed features are shifted and biased on the wafer with respect to their target dimension up to several nanometers. This effect is inherent to EUV imaging systems. In order to maintain CDU, overlay and registration requirements, these effects need to be compensated for as part of the lithographic manufacturing process. Conventional compensation techniques, such as OPC compensation, significantly increase the complexity of the litho process. In this paper we discuss pattern shift, which is induced by mask-side non-telecentricity of the EUV ring field system. In particular, we show how the mask position relative to the focal plane of the projection system impacts pattern shift. It is shown that mask focus shift allows for a compensation of pattern shift, independent on angle of incidence, pattern type, pattern pitch, pattern orientation, and slit position. Thus it is seen that placement error is not an effect related to mask topography (not a shadowing effect) but arises purely from the mask non-telecentricity. A geometric interpretation of this effect is given and shown to be consistent with results of rigorous simulations. A method to simulate the shift of the mask focus position is briefly discussed. The mask focus shift for which the pattern shift vanishes in the aerial wafer image at best focus is determined using rigorous simulations. The amount of mask focus shift to compensate for the pattern shift is found to be approximately 136nm. This mask focus shift is then applied to investigate the through focus and dose behavior of the pattern shift in the resist. It is shown that the pattern shift is a function of wafer focus position and that this is a result of the image tilt in EUV systems. While the pattern shift is fully compensated at one wafer focus position, the shift at other positions is very small. The impact of the mask focus position on process window is investigated.

Rigorous simulation of exposure over nonplanar wafers

Standard simulations of optical projection systems for lithography with scalar or vector methods of Fourier optics make the assumption that the wafer stack consists of homogeneous layers. We introduce a general scheme for the rigorous electromagnetic field (EMF) simulation of lithographic exposures over non-planar wafers. Rigorous EMF simulations are performed with the finite-difference time-domain (FDTD) method. The described method is used to simulate several typical scenarios for lithographic exposures over non-planar wafers. This includes the exposure of resist lines over a poly-Si line on the wafer with orthogonal orientation, the simulation of “classical” notch problems, and the simulation of lithographic exposures over wafers with defects.

OPC verification on cell level using fully rigorous mask topography simulation

Starting with the 45nm node, the minimum feature size on the mask has reached sub-wavelength dimension. In this regime the electromagnetic field induced in the mask is significantly impacted by the mask topography. These so called mask topography effects play an important role in the image formation process and need to be compensated for in the optical proximity correction (OPC) model. Looking ahead to the 32nm process node, mask topography effects will become even more pronounced. So, including these effects into the OPC model has become a must for advanced process nodes. Modern OPC engines start to apply electromagnetic field (EMF) compensation techniques to take these effects into account. Of course, due to the severe run time constrains for OPC models most EMF aware OPC models need to rely on approximate methods. A reliable OPC verification process needs to include a fully rigorous treatment of the mask topography effects with taking into account oblique light incidence and polarization of light. In this paper we investigate the impact of rigorous mask topography simulation on the reliability of OPC verification and determine the influence of EMF aware OPC models on OPC quality. We use lithography simulations on OPCed layout cells where we apply a fully rigorous parallelized EMF solver to the mask model. Two different OPC models are used in this study; one based on the conventional approach and another one using EMF compensation techniques. The results of the rigorous lithography simulations are used to verify both OPC models. The impact of the EMF simulation on OPC verification quality is illustrated by direct comparison with the corresponding Kirchhoff simulations for both OPC models.

Polarization-dependent proximity effects

To meet the imaging resolution requirements, driven by the evolution of IC design rules, leading-edge scanners incorporate projection lenses with hyper-NAs. Moreover, immersion scanners are being introduced into IC manufacture. Both dry and immersion tools explore the lens design regimes of unprecedented complexity. The need to predict, to analyze and to control the IC pattern CDs is met by various photolithography simulators. The continuing demand for simulation accuracy is reflected by the requirement to quantify the scanner projection lens fingerprints, i.e. projection lens infinitesimal excursions from the ideal performance. The scanner engineering community has been relying on photolithography simulators to analyze the impact of the projection lens fingerprints on the imaging characteristics. However small, these excursions are always present in the projection tools and they control important imaging characteristics such as overlay, CD uniformity, across-field exposure latitude, to name but a few. Customarily, phase front aberrations and lens pupil apodization signatures have been used to predict the scanners imaging responses. Of course, the need to design, to manufacture and to deploy scanners of ever improving quality resulted in dramatic reductions of these non-ideal imaging excursions. The evolution of IC designs and imaging tools complexity escalate the requirements for imaging simulation accuracy. Simultaneously, predicting scanner imaging response has become a key mission in the Deign For Manufacture arena. In view of these developments, it necessary to pose a question if the conventional equipment engineering and imaging simulation methodologies predict scanner imaging responses with the accuracy required by the IC design rules. Differently put, the question is: what is necessary to provide simulation accuracy required by the current IC design rules? This report attempts to address these questions.

Combining lithography and etch models in OPC modeling

With constant shrinking of device critical dimensions (CD), the quality of pattern transfer in IC fabrication depends on the etch process and the exposure process fidelities, and the interaction of lithographic and etching processes is no longer negligible. Etch effect correction with accurate models has become an important component in optical proximity correction (OPC) modeling and related applications. It is now commonly accepted that the lithographic and etch effects should be modeled and corrected in a sequential and staged way: a resist (or lithographic) model should be created and used for lithographic effect compensation, and an etch model should be created and used for etch effect compensation. However, there can be various degrees of separation of these two modeling stages. In order to optimally capture the significant variation in the post-development resist patterns and post-etching patterns, it is helpful to integrate these two processes together for the OPC model calibration practice. In this paper, we analyze the integrated simulation approach in OPC modeling where the entire resist model information is made fully accessible in the etch modeling stage to allow the possibility of resist and etch co-optimization, e.g. through adjusting the resist model to optimally fit the etch data. Furthermore, the integrated simulation technique is integrated into a verification flow to simplify the conventional staged flow.

The impact of mask design on EUV imaging

EUV exposure tools are the leading contenders for patterning critical layers at the 22nm technology node. Operating at the wavelength of 13.5nm, with modest projection optics numerical aperture (NA), EUV projectors allow less stringent image formation conditions. On the other hand, the imaging performance requirements will place high demands on the mechanical and optical properties of these imaging systems. A key characteristic of EUV projection optics is the application of a reflective mask, which consists of a reflective multilayer stack on which the IC layout is represented by the reflectivity discontinuities1. Several mask concepts can provide such characteristics, such as thick absorbers on top of a reflective multi-layer stack, masks with embedded absorbers, or absorber-free masks with patterns etched in a reflective multilayer. This report analyzes imaging performance and tradeoffs of such new mask designs. Various mask types and geometries are evaluated through imaging simulations. The applied mask models take into account the topographic nature of the mask structures, as well as the fundamental, vectorial characteristics of the EUV imaging process. Resulting EUV images are compared in terms of their process stability as well as their sensitivities to the EUV-specific effects, such as pattern shift and image tilt, driven by the reflective design of the exposure system and the mask topography. The simulations of images formed in EUV exposure tools are analyzed from the point of view of the EUV mask users. The fundamental requirements of EUV mask technologies are discussed. These investigations spotlight the tradeoffs of each mask concept and could serve as guidelines for EUV mask engineering.

Split, overlap/ stitching and process design for double patterning considering local reflectivity variation by using rigorous 3D wafer-topography/ lithography simulation

Double patterning (DP) was investigated for logic layout by using rigorous 3D wafer-topography/ lithography simulator with water immersion lithography. With increasing complexity of DP process, 3D wafer-topography effect of stack structure must be considered, because of its impact to lithography. The main purpose of this paper is to present how to optimize both process and design to ensure overlap and connectivity of split pattern, by solving electro-magnetic field distribution in wafer substrate as well as resist region. Process window was analyzed varying not only focus, dose and split masking layers, but also considering topography of substrate stack structures, which cause local reflectivity variations. Arbitrary 45nm logic layout including L-shape pattern was analyzed. Process window of second Litho step was analyzed. Due to reflection from Hard Mask, HM (the first Litho step) the process window was restricted and became smaller. The other option, swapping first and second Litho masks is a better choice with respect to impact of wafer topography. The optimization of stack process condition was analyzed by using contour plot of reflectivity, as functions of n, k and thickness of materials inside BARC. The concept of Extended NILS considering local reflectivity variation from wafer process is able to explain the variation of resist sidewall slope and Exposure Latitude. Therefore, it is useful to analyze connectivity at stitching point by using 3D wafer-topography/ lithography simulator and to optimize the combination of DP process and layout stitching design. Furthermore as design of advanced process, LLE (Litho-Litho-Etch), with resist freezing was simulated.

Analysis of topography effects on lithographic performance in double patterning applications

Double Patterning (DP) is considered the most viable solution for printing features of the 32nm technology node using 193nm immersion lithography. Independent of the approach of the DP implementation (be it Litho-Etch-Litho-Etch or Litho-Process-Litho-Etch), the second lithography step is influenced by the underlying topography on the wafer. Given the tight constraints on the process, an accurate prediction of the impact of the embedded topography on critical features is inevitable to meet the design requirements of the corresponding device layer. In this paper we use rigorous simulations of the electro-magnetic field distribution to quantify the effect of wafer topography on the second lithography step. In particular, we investigate the impact of the topography on CD control and corresponding process windows for typical 1D patterns. The influence of non-flat BARC, non-flat resist surfaces, hard mask material and process variations in the first litho step is simulated for dual line as well as dual trench processes. A metric to quantify standing waves in resist is introduced and used to optimize BARC thickness. Further, we investigate typical 2D clips of decomposed mask layouts relevant for the 32nm node. The simulation methodology and algorithm performance are presented, in particular with respect to its distributed computing capabilities.