Tolga Dinc

Integrated Wideband Self-Interference Cancellation in the RF Domain for FDD and Full-Duplex Wireless

A fully integrated technique for wideband cancellation of transmitter (TX) self-interference (SI) in the RF domain is proposed for multiband frequency-division duplexing (FDD) and full-duplex (FD) wireless applications. Integrated wideband SI cancellation (SIC) in the RF domain is accomplished through: 1) a bank of tunable, reconfigurable second-order high-Q RF bandpass filters in the canceller that emulate the antenna interfaces isolation (essentially frequency-domain equalization in the RF domain) and 2) a linear N-path Gm-C filter implementation with embedded variable attenuation and phase shifting. A 0.8-1.4 GHz receiver (RX) with the proposed wideband SIC circuits is implemented in a 65 nm CMOS process. In measurement, >20 MHz 20 dB cancellation bandwidth (BW) is achieved across frequency-selective antenna interfaces: 1) a custom-designed LTElike 0.780/0.895 GHz duplexer with TX/RX isolation peak magnitude of 30 dB, peak group delay of 11 ns, and 7 dB magnitude variation across the TX band for FDD and 2) a 1.4 GHz antenna pair for FD wireless with TX/RX isolation peak magnitude of 32 dB, peak group delay of 9 ns, and 3 dB magnitude variation over 1.36-1.38 GHz. For FDD, SIC enhances the effective outof-band (OOB) IIP3 and IIP2 to +25-27 dBm and +90 dBm, respectively (enhancements of 8-10 and 29 dB, respectively). For FD, SIC eliminates RX gain compression for as high as -8 dBm of peak in-band (IB) SI, and enhances effective IB IIP3 and IIP2 by 22 and 58 dB.

19.1 Receiver with >20MHz bandwidth self-interference cancellation suitable for FDD, co-existence and full-duplex applications

In this paper, a 0.8-to-1.4GHz receiver with a tunable, reconfigurable RF SI canceller at the RX input is presented that supports >20MHz cancellation BW across a variety of antenna interfaces (nearly 10× improvement over a conventional canceller). This is accomplished by (i) a bank of tunable, reconfigurable 2nd-order high-Q RF bandpass filters in the canceller to emulate the antenna interface isolation (essentially RF frequency-domain equalization), and (ii) a linear N-path Gm-C filter implementation with embedded variable attenuation and phase shifting. For FDD, SIC enhances effective OOB IIP3 and IIP2 to +25-27d Bm and +90d Bm respectively. For SC-FD, SIC eliminates RX gain compression for as high as -8 dBm of peak in-band SI, and enhances effective in-band IIP3 and IIP2 by 22dB and 58 dB.

A 60 GHz CMOS Full-Duplex Transceiver and Link with Polarization-Based Antenna and RF Cancellation

This paper presents a fully integrated 60 GHz directconversion transceiver in 45 nm SOI CMOS for same-channel full-duplex (FD) wireless communication. FD operation is enabled by a novel polarization-based wideband reconfigurable selfinterference cancellation (SIC) technique in the antenna domain. The antenna cancellation can be reconfigured from the IC to combat the variable SI scattering from the environment during in-field operation. A second RF cancellation path with> 30 dB gain control and> 360° phase control from the transmitter (TX) output to the LNA output further suppresses the residual SI to achieve the high levels of required SIC. With antenna and RF cancellation together, a total SI suppression of > 70 dB is achieved over a cancellation bandwidth of 1 GHz and can be maintained in the presence of nearby reflectors. In conjunction with digital SIC (DSIC) implemented in MATLAB, a FD link is demonstrated over 0.7 m with a signal-to-interference-noise-and-distortion ratio (SINDR) of 7.2 dB. To the best of our knowledge, this work achieves the highest integration level among FD transceivers irrespective of the operation frequency and demonstrates the first fully integrated mm-wave FD transceiver front-end and link.

A T/R antenna pair with polarization-based reconfigurable wideband self-interference cancellation for simultaneous transmit and receive

This paper proposes a transmit and receive (T/R) antenna pair with a novel wideband self-interference cancellation (SIC) feature for simultaneous transmit and receive (STAR) or full-duplex applications. The T/R antennas have orthogonal linear polarizations and an auxiliary port which is cross-polarized with the receive port is introduced on the receive antenna. Introduction of a reconfigurable reflective termination on the auxiliary port reflects the coupled signal to cancel the self interference at the RX port. The reconfigurable termination mimics the required conductance and susceptance across a wide frequency range to achieve wideband SIC. When SIC is activated, isolation between the T/R antenna pair is higher than 50 dB over 300MHz centered at 4.6 GHz. The proposed cancellation technique provides 20 dB improvement in the T/R isolation over 400 MHz. It can be reconfigured in the presence of environmental changes and reflections to recover the degradation in the cancellation. The antenna pair is also employed in a transceiver built using off the shelf components and 70 dB total SIC is achieved in conjunction with digital cancellation.

17.2 A 28GHz magnetic-free non-reciprocal passive CMOS circulator based on spatio-temporal conductance modulation

A significant challenge for silicon-based mm-wave systems is a low-loss shared-antenna (ANT) interface with high linearity, isolation (ISO) and bandwidth (BW). Shared ANT interfaces with simultaneous transmit and receive capability are critical for mm-wave 5G base stations that need to simultaneously communicate with multiple users, FMCW-based radars, and emerging full-duplex systems [1].

A 60 GHz same-channel full-duplex CMOS transceiver and link based on reconfigurable polarization-based antenna cancellation

This paper describes a direct-conversion 45nm SOI CMOS 60 GHz transceiver for same-channel full duplex applications. A novel polarization-based wideband self-interference cancellation (SIC) technique in the antenna domain is described that can be reconfigured from the IC. In order to achieve the high levels of required SIC, a second RF cancellation path from the transmitter output to the LNA output with >30 dB gain control and >360° phase control is also integrated. The TX and RX share the same LO to reduce the impact of phase noise on SIC. Antenna and RF cancellation together enable >70 dB of total self-interference suppression even in the presence of nearby reflectors. In conjuction with digital SIC impemented in MATLAB, a same-channel full-duplex link is demonstrated over 0.7 m. To the best of our knowledge, this work demonstrates the first fully-integrated full-duplex transceiver front-end and mm-wave link. While not our focus, the transceiver also achieves state-of-the-art saturated output power of +15 dBm, peak TX efficiency of 15.3% and RX NF of 4 dB.

An X-Band Slow-Wave T/R Switch in 0.25-

This brief presents a fully integrated X-band transmit/receive (T/R) switch using slow-wave transmission lines for X-band phased-array radar applications. The T/R switch was fabricated in a 0.25- μm SiGe bipolar CMOS (BiCMOS) process and occupies 0.73- mm2 chip area, excluding pads. The switch is based on shunt-shunt topology and employs isolated n-channel (NMOS) transistors and slow-wave microstrip lines. Additionally, resistive body floating and dc biasing are employed to improve the power-handling capability (P1 dB) of the switch. The T/R switch resulted in a measured insertion loss of 2.1-2.9 dB and isolation of 39-42 dB from 8 to 12 GHz. The input referred P1 dB is 27.6 dBm at 10 GHz. To our knowledge, this brief presents the utilization of slow-wave transmission lines in T/R switches for the first time. Furthermore, it can simultaneously satisfy stringent isolation, insertion loss, and power-handling capability requirements for implementing a fully integrated SiGe T/R module.

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Full duplex wireless has drawn significant interest in the recent past due to the potential for doubling network capacity in the physical layer and offering numerous other benefits at higher layers. However, the implementation of integrated full duplex radios is fraught with several fundamental challenges. Achieving the levels of self-interference cancellation required over the wide bandwidths mandated by emerging wireless standards is challenging in an integrated circuit implementation. The dynamic range limitations of integrated electronics restrict the transmitter power levels and receiver noise floor levels that can be supported in integrated full duplex radios. Advances in compact antenna interfaces for full duplex are also required. Finally, networks employing full duplex nodes will require a complete rethinking of the medium access control layer as well as cross-layer interaction and co-design. This article describes recent research results that address these challenges. Several generations of full duplex transceiver ICs are described that feature novel RF self-interference cancellation circuits, antenna cancellation techniques, and a non-magnetic CMOS circulator. Resource allocation algorithms and rate gain/improvement characterizations are also discussed for full duplex configurations involving IC-based nodes.

SiGe BiCMOS

Full-duplex wireless is an exciting emerging wireless communication paradigm that also poses tremendous challenges at virtually every layer: from the antenna interface and integrated circuits (ICs) and systems to the network layer. This paper covers recent advances at Columbia University across all these dimensions. Several potential full-duplex system architectures that are appropriate for different application spaces are discussed. Specific research advances include (i) a novel integrated CMOS non-reciprocal circulator that utilizes time-variance to break Lorentz reciprocity, (ii) a polarization-based antenna cancellation technique that achieves very wideband isolation that can be reconfigured as the environment changes, (iii) several generations of RF and analog self-interference cancellation circuits that combat noise, distortion and bandwidth limitations, (iv) higher-layer resource allocation algorithms that evaluate full-duplex rate gains given realistic physical layer models, and (v) demonstrations of full-duplex operation using realistic IC-based nodes.

Integrated Full Duplex Radios

This paper presents the design and implementation of a single-pole, double-throw transmit/receive T/R switch for X-Band 8-12GHz phased array radar applications. The T/R switch was fabricated in a 0.25-µm SiGe BiCMOS process and occupies 0.44-mm2 chip area, including pads. The design focuses on the techniques, primarily, to achieve higher power handling capability P1dB, along with higher isolation and better insertion loss IL of the T/R switch. These techniques include resistive-body floating, using on-chip impedance transformation networks and DC biasing of all terminals of the T/R switch. In addition, optimization of transistor widths and parallel resonance technique are used to improve IL and isolation, respectively. All these design techniques resulted in a measured IL of 3.6dB, isolation of 34.8dB and IP1dB of 28.2 dBm at 10GHz. The return losses at both input and output ports are better than 16dB from 8 to 12GHz. To our knowledge, this paper presents the single-ended CMOS T/R switch with the highest IP1dB, competitive isolation and comparable IL at X-Band, compared to other reported works in the literature and attributed to the unique design methodologies and techniques. Copyright