Tomokatsu Watanabe

Realization of low on-resistance 4H-SiC power MOSFETs by using retrograde profile in P-body

Inversion-type 4H-SiC power MOSFETs using p-body implanted with retrograde profiles have been fabricated. The Al concentration at the p-body surface (Nas) is varied in the range from 5×1015 to 2×1018 cm-3. The MOSFETs show normally-off characteristics. While the Ron is 3 cm2 at Eox = (Vg-Vth)/dox ≅ 3 MV/cm for the MOSFET with the Nas of 2×1018 cm-3, the Ron is reduced by a decrease in the Nas and 26 mcm2 is attained for the device with the Nas of 5×1015 cm-3. The inversion channel mobility and threshold voltage are improved with a decrease in the Nas. By modifying the structural parameter of the MOSFET, a still smaller Ron of 7 mcm2 is achieved with a blocking voltage of 1.3 kV.

Effect of grain boundary microstructures of brittle fracture in polycrystalline molybdenum

Superplasticity can be generally achieved by grain boundary sliding (GBS). The GBS in polycrystalline materials sometimes accompanies with intergranular fracture because of stress concentrations at triple points and/or GB irregularities. To develop the superplastic flow, it is necessary to suppress the intergranular cracking. In the present study, therefore, polycrystalline molybdenum with distinct GB microstructures, such as grain boundary character distribution (GBCD), has been employed to clarify the relationship between fracture behaviour and GB microstructures. Microstructures were analyzed using a FE-SEM/EBSP/OIM system prior to 4-points bending tests at 77K, thereafter, crack propagation was observed. The main results obtained are as follows. Stress fluctuations on stress - strain curves were observed for specimens with random oriented grains, whereas such behaviour rarely occurred for ones with textured grains. Difference in the behaviour would result from difference in the fracture mode; while cleavage fracture was the predominant mode for the latter case, not only cleavage fracture but also intergranular fracture, particularly along random grain boundaries, took place for the former case. These evidences suggest that random GBs play a role as weak intrinsic defects, so that the connectivity of random GBs would become important. In addition, fracture strength depended remarkably on the frequency of low Σ GBs. When cracks propagated predominantly along GBs, the fracture strength increased with increasing the frequency of low Σ GBs up to cleavage strength. This tendency would probably be of great significance at high temperatures, because cleavage fracture would be expected to be limited at high temperatures. Accordingly, to introduce a large number of random grain boundaries leads to extensive microcracks along the boundaries, probably resulting in nonsuperplastic behaviour.

Fabrication and Performance of 1.2 kV, 12.9 mΩcm2 4H-SiC Epilayer Channel MOSFET

4H-SiC epilayer channel MOSFETs are fabricated. The MOSFETs have an n- epilayer channel which improves the surface where the MOS channel is formed. By the optimization of the epilayer channel and the MOSFET cell structure, an ON-resistance of 12.9 mcm2 is obtained at VG = 12 V (Eox = 2.9 MV/cm). A normally-OFF operation and stable avalanche breakdown is obtained at the drain voltage larger than 1.2 kV. Both the ON-resistance and the breakdown voltage increase slightly with an increase in temperature. This behavior is favorable for high power operation. By the evaluation of the control MOSFETs with n+ implanted channel, the resistivity of the MOS channel is estimated. The MOS channel resistivity is proportional to the channel length and it corresponds to an effective channel mobility of about 20 cm2/Vs.

Effects of Implantation Temperature on Sheet and Contact Resistance of Heavily Al Implanted 4H-SiC

Effects of implantation temperature on electrical properties of heavily-Al-doped 4H-SiC layer formed with Al implantation have been investigated. To form the p++ 4H-SiC with the original 4H-stacking structure, the implantation temperature above 175 °C is needed. A decrease in the implantation temperature below 250 °C leads to an increase in the NA-ND. It is suggested that an increase in the density of vacancies with a decrease in the implantation temperature promotes the Al substitution to lattice sites during activation annealing. The lower-temperature implantation also causes a decrease in activation energy for the p-type electrical conduction and a decrease in p-type ohmic contact resistivity. We presume that the increase in the Al acceptors at low-implantation temperatures gives expansion of the impurity bands and formation of valence band tail-states, causing the decrease in the impurity binding energy. The properties obtained with the lower-temperature implantation are desirable for practical applications especially at low temperatures.

Observation of Crystalline Defects Causing pn Junction Reverse Leakage Current

A major crystalline defect which causes a pn junction reverse leakage current has been identified. A faintish stripe defect (FSD), the main cause of the leakage current, was observed in about 90% of the current leak points of our pn diodes. Double shell pits were observed at the edge of the FSD after molten KOH etching, indicating that the FSD is elongated on a basal plane and crosses the epilayer surface. The FSDs are sorted into several groups in terms of the shapes and arrangements of the etch pits. A cross-sectional TEM image of an FSD shows an eight-hold stacked structure, demonstrating that the defect contains a stacking fault. Etch pit observation after repetitive RIE of an epilayer revealed that FSDs originate both in threading dislocations in SiC substrates and from an SiC epitaxial growth process itself.

Switching Characteristics of SiC-MOSFET and SBD Power Modules

Prototype SiC power modules are fabricated using our class 10 A, 1.2 kV SiC-MOSFETs and SiC-SBDs, and their switching characteristics are evaluated using a double pulse method. Switching waveforms show that both overshoot and tail current, which induce power losses, are suppressed markedly compared with conventional Si-IGBT modules with similar ratings. The total switching loss (MOSFET turn-ON loss, turn-OFF loss and SBD recovery loss) of SiC power modules is measured to be about 30% of that of Si-IGBT modules under the generally-used switching condition (di/dt ~250A/μs). The three losses of SiC modules decrease monotonically with a decrease in gate resistance, namely switching speed. The result shows the potential of unipolar device SiC power modules.

Depletion-Mode TDDB for n-Type MOS Capacitors of 4H-SiC

TDDB for n-type 4H-SiC MOS capacitors depleted by DC bias (named as depletion-mode TDDB) has been investigated. The lifetime distribution can apparently be classified into two groups: shorter and longer tBD. Breakdown for the shorter tBD occurs at a point close to a threading dislocation. In contrast, the capacitors possessing longer tBD include no dislocation. An increase in the stress temperature and/or EOX leads to a decrease in tBD, indicating that the breakdown is caused by gate-oxide degradation. On the other hand, the tBD distributions acquired by accumulation-mode TDDB are relatively even, and the breakdown point is independent of dislocations. We presume that holes excited in the SiC layer by hot electrons play an important role at a threading dislocation for depletion-mode TDDB.

Numerical Evaluation of Forward Voltage in SiC Pin Diode with Non-Ohmic Current Component in Contact to p-Type Layer

Forward voltage of SiC pin diodes is evaluated by device simulation, where a p-type contact is described by Schottky barrier to a p-type surface region. The contact resistance is calculated from the comparison to I-V characteristic of Schottky structure to a p-SiC layer with a sufficiently low Schottky barrier height. Even in the relatively low contact resistance rc of 10-4 Wcm2, non-ohmic current component is observed in Schottky structure to p-SiC and the increase of forward voltage of pin diodes is fairly small. Forward voltage of pin diodes increases in the pin diodes with contact resistance rc over 10-4 Wcm2. The same behavior is also observed irrespective of a time constant of carriers, and doping concentration and thickness of a drift layer.

Crystalline Recovery after Activation Annealing of Al Implanted 4H-SiC

Crystalline recovery mechanism in the activation annealing process of Al implanted 4H-SiC crystals were experimentally investigated. Annealing temperature and annealing time dependence of acceptor activation and activated hole’s behavior were examined. Poly-type recovery from the implantation induced lattice disordering during the annealing was investigated. The existence of meta-stable crystalline states for acceptor activation, and related scattering centers due to annealing is reported To achieve 100% acceptor activation and to reduce strain after ion implantation, annealing at 2000°C for 10 min. was required.