Keiko Fujihira

High-purity and high-quality 4H-SiC grown at high speed by chimney-type vertical hot-wall chemical vapor deposition

4H–SiC layers have been homoepitaxially grown at a high growth rate of 25 μm/h by chimney-type vertical hot-wall chemical vapor deposition at 1700 °C. Through photoluminescence measurement, the intrinsic defect, so-called L1 peak, was found to be reduced under a C-rich condition. In the deep level transient spectroscopy measurement, the Z1 center was also found to be suppressed under a C-rich condition. For a 75-μm-thick epilayer, the net donor concentration was reduced to as low as 5×1012 cm−3. In low-temperature photoluminescence, free exciton peaks are dominant, indicating high purity of the epilayer.

Low-loss, high-voltage 6H-SiC epitaxial p-i-n diode

The p-i-n diodes were fabricated using 31 /spl mu/m thick n/sup -/- and p-type 6H-SiC epilayers grown by horizontal cold-wall chemical vapor deposition (CVD) with nitrogen and aluminum doping, respectively. The diode exhibited a very high breakdown voltage of 4.2 kV with a low on-resistance of 4.6 m/spl Omega/cm/sup 2/. This on-resistance is lower (by a factor of five) than that of a Si p-i-n diode with a similar breakdown voltage. The leakage current density was substantially lower even at high temperatures. The fabricated SiC p-i-n diode showed fast switching with a turn-off time of 0.18 /spl mu/s at 300 K. The carrier lifetime was estimated to be 0.64 /spl mu/s at 300 K, and more than 5.20 /spl mu/s at 500 K. Various characteristics of SiC p-i-n diodes which have an advantage of lower power dissipation owing to conductivity modulation were investigated.

Growth and characterization of 4H–SiC in vertical hot-wall chemical vapor deposition

Abstract Vertical hot-wall chemical vapor deposition of SiC at high growth rates has been investigated. 4H–SiC epilayers, with a quality even superior to conventional epilayers, were grown at 25– 60 μm/h , 5–10 times higher than the conventional speed. The correlation of the growth mechanism to Si cluster decomposition is described. Excellent surface morphology of the epilayer grown at 25– 60 μm/h was attained by control of H 2 etching during the heating process, in which C 3 H 8 was introduced at 1200°C and SiH 4 at 1300°C. The lowest net donor concentration was 5×10 12 cm −3 . In the low-temperature photoluminescence spectrum, free exciton peaks were remarkably dominant, and no impurity-related peaks were observed. Through DLTS measurements, the EH 6/7 center located at the midgap of E c −1.65 eV was detected. This trap could be suppressed under a C-rich condition as in the case of the Z 1/2 center.

TDDB Measurement of Gate SiO2 on 4H-SiC Formed by Chemical Vapor Deposition

The reliability of CVD gate oxide was investigated by CCS-TDDB measurement and compared with thermally grown gate oxide. Although the QBD of thermal oxide becomes smaller for the larger oxide area, the QBD of CVD oxide is almost independent of the investigated gate oxide area. The QBD at F = 50% of CVD oxide, 3 C/cm2, is two orders of magnitude larger for the area of 1.96×10-3 cm2 at 1 mA/cm2 compared to that of thermal oxide. More than 80% of the CVD oxide breakdown occurs at the field oxide edge and more than 70% of the thermal oxide breakdown in the inner gate area. These results suggest that the lifetime of CVD oxide is hardly influenced by the quality of SiC, while the defects and/or impurities in SiC affect the lifetime of thermally grown oxide.

Fast epitaxial growth of 4H-SiC by chimney-type vertical hot-wall chemical vapor deposition

4H–SiC has been homoepitaxially grown on off-axis 4H–SiC(0001) at 1700°C by chimney-type vertical hot-wall chemical vapor deposition. Mirror-like surface morphology can be obtained with high growth rates up to 21 µm/h. Epitaxial growth under C-rich conditions at growth rates of 10–14 µm/h leads to enhanced macrostep formation but reduced doping and deep trap concentrations of 7.2×1014 cm-3 and 1.3×1013 cm-3, respectively. Good thickness and doping uniformities of 4% and 6%, respectively, are achieved with this growth technique.

Realization of low on-resistance 4H-SiC power MOSFETs by using retrograde profile in P-body

Inversion-type 4H-SiC power MOSFETs using p-body implanted with retrograde profiles have been fabricated. The Al concentration at the p-body surface (Nas) is varied in the range from 5×1015 to 2×1018 cm-3. The MOSFETs show normally-off characteristics. While the Ron is 3 cm2 at Eox = (Vg-Vth)/dox ≅ 3 MV/cm for the MOSFET with the Nas of 2×1018 cm-3, the Ron is reduced by a decrease in the Nas and 26 mcm2 is attained for the device with the Nas of 5×1015 cm-3. The inversion channel mobility and threshold voltage are improved with a decrease in the Nas. By modifying the structural parameter of the MOSFET, a still smaller Ron of 7 mcm2 is achieved with a blocking voltage of 1.3 kV.

Fast Epitaxial Growth of High-Quality 4H-SiC by Vertical Hot-Wall CVD

Fast epitaxial growth of 4H-SiC in a vertical hot-wall reac tor is described. A high growth rate of 25∼60 μm/h, 5 to 10 times higher than the conventional growth, was achieved at 1700 °C by the enhanced decomposition of Si clusters. Mirror-like surface morphology has been obtained for the epilayers grown at 25 ∼60 μm/h by the control of H2 etching during the heating process, in which C3H8 was introduced at 1200 °C and SiH4 at 1300°C. High-quality epilayers with a net donor concentration of low 10 13 cm or below was attained. The DLTS measurements up to 820 K have found that the EH6/7 center could be reduced by increasing C/Si ratio.

High-Voltage 4H-SiC Schottky Barrier Diodes Fabricated on (0338) with Closed Micropipes.

Ni/4H–SiC Schottky barrier diodes have been fabricated on homoepitaxial layers grown on 4H–SiC(038) substrates. Micropipes existing in the substrates were almost completely dissociated during epitaxial growth. Schottky barrier diodes processed on the areas with closed micropipes exhibited low leakage current, at least, up to 1 kV. The difference in breakdown voltage between micropipe-free diodes and diodes with closed micropipes was less than 10%. A 2.9 kV–22 mΩcm2 diode was realized on the area with closed micropipes.

Complete Micropipe Dissociation in 4H-SiC(03-38) Epitaxial Growth and its Impact on Reverse Characteristics of Schottky Barrier Diodes

Micropipe dissociation has been investigated in homoepitaxial growth of 4H-SiC(03 3 8) by chemical vapor deposition. Almost complete (~100%) closing of micr opipes was realized, although some of very large (> 3 μm) micropipes were threading into epilayers. Based on KOH etching experiments on various epilayers, the authors propose a model of micropipe dissociation in 4H-SiC(03 38) epitaxial growth. The reverse characteristics of Ni/4H-SiC (03 38) Schottky barrier diodes were significantly improved by micropipe closing. Introduction Recent progress in SiC growth and processing technologies has accel er ted the development of high-voltage SiC diodes and FETs [1]. To scale up the current handling c apability of SiC power devices, however, micropipes (hollow cores associated with superscrew dislocations) have to be eliminated [2]. Furthermore, 4H-SiC(0001) MOSFETs have suffered from unacceptably low channel mobility, which has significantly limited the MOSFET perf ormance [3]. To overcome these problems, the authors have proposed a novel crystal face, 4H-SiC(03 38), which is inclined by 54.7 from (0001) toward [01 10] and is semi-equivalent to (001) in the cubic structure [4]. The quality of SiO2/4H-SiC(03 38) interface may be potentially superior, compared with the conventional (0001) [5]. In this paper, complete dissociation (closing) of mi cropipes in 4HSiC(03 38) epitaxial growth is presented. The improved reverse characteris ti s of 2~3 kV Schottky barrier diodes are demonstrated. Epitaxial Growth of 4H-SiC(03 38) Homoepitaxial growth was performed by either horizontal hot-wall CV D at 1550C [6] or chimneytype vertical CVD at 1700 C [7] in a SiH4-C3H8-H2 system on 4H-SiC(0338) substrates. 4HSiC(03 38) substrates were prepared by slicing of 4H-SiC boules grown on (000 1) seed crystals at SiXON. The typical size of substrates was about 40 x 2 mm. The C/Si ratio during CVD was 1.5~1.8 for horizontal hot-wall CVD and 0.7~0.8 for chimney-type CVD. The typic al growth rate was 5 μm/h for horizontal CVD and 20 μm/h for chimney-type CVD. The epilayers were 15~110 μm thick and were unintentionally doped with nitrogen to 7 x10~2x10 cm. Specular surface morphology was obtained with a rms roughness of 0.18~0.22 nm in a 10 μm x 10 μm area. No macrostep bunching was observed, owing to the lack of intentional off-angle . Details of 4HSiC(03 38) growth are described elsewhere [8]. Micropipe Dissociation during 4H-SiC(03 38) Epitaxial Growth Materials Science Forum Online: 2003-09-15 ISSN: 1662-9752, Vols. 433-436, pp 197-200 doi:10.4028/www.scientific.net/MSF.433-436.197

Fabrication and Performance of 1.2 kV, 12.9 mΩcm2 4H-SiC Epilayer Channel MOSFET

4H-SiC epilayer channel MOSFETs are fabricated. The MOSFETs have an n- epilayer channel which improves the surface where the MOS channel is formed. By the optimization of the epilayer channel and the MOSFET cell structure, an ON-resistance of 12.9 mcm2 is obtained at VG = 12 V (Eox = 2.9 MV/cm). A normally-OFF operation and stable avalanche breakdown is obtained at the drain voltage larger than 1.2 kV. Both the ON-resistance and the breakdown voltage increase slightly with an increase in temperature. This behavior is favorable for high power operation. By the evaluation of the control MOSFETs with n+ implanted channel, the resistivity of the MOS channel is estimated. The MOS channel resistivity is proportional to the channel length and it corresponds to an effective channel mobility of about 20 cm2/Vs.