Yukiyasu Nakao

TDDB Measurement of Gate SiO2 on 4H-SiC Formed by Chemical Vapor Deposition

The reliability of CVD gate oxide was investigated by CCS-TDDB measurement and compared with thermally grown gate oxide. Although the QBD of thermal oxide becomes smaller for the larger oxide area, the QBD of CVD oxide is almost independent of the investigated gate oxide area. The QBD at F = 50% of CVD oxide, 3 C/cm2, is two orders of magnitude larger for the area of 1.96×10-3 cm2 at 1 mA/cm2 compared to that of thermal oxide. More than 80% of the CVD oxide breakdown occurs at the field oxide edge and more than 70% of the thermal oxide breakdown in the inner gate area. These results suggest that the lifetime of CVD oxide is hardly influenced by the quality of SiC, while the defects and/or impurities in SiC affect the lifetime of thermally grown oxide.

Realization of low on-resistance 4H-SiC power MOSFETs by using retrograde profile in P-body

Inversion-type 4H-SiC power MOSFETs using p-body implanted with retrograde profiles have been fabricated. The Al concentration at the p-body surface (Nas) is varied in the range from 5×1015 to 2×1018 cm-3. The MOSFETs show normally-off characteristics. While the Ron is 3 cm2 at Eox = (Vg-Vth)/dox ≅ 3 MV/cm for the MOSFET with the Nas of 2×1018 cm-3, the Ron is reduced by a decrease in the Nas and 26 mcm2 is attained for the device with the Nas of 5×1015 cm-3. The inversion channel mobility and threshold voltage are improved with a decrease in the Nas. By modifying the structural parameter of the MOSFET, a still smaller Ron of 7 mcm2 is achieved with a blocking voltage of 1.3 kV.

Development of 3.3 kV SiC-MOSFET: Suppression of Forward Voltage Degradation of the Body Diode

In order to achieve cost reduction or shrinkage of power devices, an internal body diode, which forms in a MOSFET parasitically, can be designed as a free-wheeling diode in substitution for an external Schottky barrier diode (SBD). However, in a SiC p-i-n diode, forward current stress causes reliability degradation due to expansion of the electron-hole recombination-induced stacking faults. Applying the process optimization of the epitaxial layer for the reduction of recombination-induced stacking faults and the body diode screening method to 3.3 kV SiC-MOSFETs, we obtained more stable devices under forward current operation.

Low on-resistance 1.2 kV 4H-SiC MOSFETs integrated with current sensor

4H-SiC MOSFETs integrated with a current sensor have been fabricated for the first time. The MOSFET shows superior characteristics with a specific on-resistance of 3.7 mΩcm2 and a blocking voltage of 1.4 kV. The deviation of the current ratio (Imain/Isense) stays within 10% in the temperature range between 25°C and 175°C, which is desirable for the current sensor of high power devices. Furthermore, the main current shut-off operation at an over-current detected using the current sensor has been demonstrated successfully.

Investigation into Short-Circuit Ruggedness of 1.2 kV 4H-SiC MOSFETs

The shout-circuit ruggedness of prototype 1.2kV SiC MOSFETs has been investigated. The short-circuit measurements were carried out at 25 °C and 125 °C with a dc bus voltage of 800 V and an on/off state gate voltage of +20/-10 V. The small difference in tfail between 25 °C and 125 °C indicates that the destructive breakdown occurs at temperatures much higher than 125 °C. The temperature at destructive breakdown estimated from the Wunsch-Bell formula is about 1400 °C. At such high temperatures, intrinsic carriers are increased markedly and generated heat leads to the destructive breakdown. tfail of all the SiC-MOSFETs studied is longer than 10 μs, meaning that the short-circuit ruggedness satisfies system requirements. These results show that the SiC-MOSFETs are promising for power electronics applications.

Fabrication and Performance of 1.2 kV, 12.9 mΩcm2 4H-SiC Epilayer Channel MOSFET

4H-SiC epilayer channel MOSFETs are fabricated. The MOSFETs have an n- epilayer channel which improves the surface where the MOS channel is formed. By the optimization of the epilayer channel and the MOSFET cell structure, an ON-resistance of 12.9 mcm2 is obtained at VG = 12 V (Eox = 2.9 MV/cm). A normally-OFF operation and stable avalanche breakdown is obtained at the drain voltage larger than 1.2 kV. Both the ON-resistance and the breakdown voltage increase slightly with an increase in temperature. This behavior is favorable for high power operation. By the evaluation of the control MOSFETs with n+ implanted channel, the resistivity of the MOS channel is estimated. The MOS channel resistivity is proportional to the channel length and it corresponds to an effective channel mobility of about 20 cm2/Vs.

4H-SiC Power Metal?Oxide?Semiconductor Field Effect Transistors and Schottky Barrier Diodes of 1.7 kV Rating

4H-SiC metal–oxide–semiconductor field effect transistors (MOSFETs) and Schottky barrier diodes (SBDs) of 10 A/1.7 kV rating were fabricated and characterized. Suitable design of a drift layer and a junction termination realized stable avalanche breakdown of 1.8 kV. Relatively low on-resistances of 8.3 mΩ cm2 for the MOSFET and 2.2 mΩ cm2 for the SBD were successfully recorded. Temperature dependence of the static characteristics of the SBD showed positive temperature coefficient in both the avalanche breakdown voltage and the differential on-resistance. The MOSFET and SBD were assembled into an SiC module. Its dynamic characterization revealed that the switching loss reduction in the SiC module was as much as 86% in comparison with that of the conventional Si counterpart under a moderate switching condition.

Observation of Crystalline Defects Causing pn Junction Reverse Leakage Current

A major crystalline defect which causes a pn junction reverse leakage current has been identified. A faintish stripe defect (FSD), the main cause of the leakage current, was observed in about 90% of the current leak points of our pn diodes. Double shell pits were observed at the edge of the FSD after molten KOH etching, indicating that the FSD is elongated on a basal plane and crosses the epilayer surface. The FSDs are sorted into several groups in terms of the shapes and arrangements of the etch pits. A cross-sectional TEM image of an FSD shows an eight-hold stacked structure, demonstrating that the defect contains a stacking fault. Etch pit observation after repetitive RIE of an epilayer revealed that FSDs originate both in threading dislocations in SiC substrates and from an SiC epitaxial growth process itself.

Switching Characteristics of SiC-MOSFET and SBD Power Modules

Prototype SiC power modules are fabricated using our class 10 A, 1.2 kV SiC-MOSFETs and SiC-SBDs, and their switching characteristics are evaluated using a double pulse method. Switching waveforms show that both overshoot and tail current, which induce power losses, are suppressed markedly compared with conventional Si-IGBT modules with similar ratings. The total switching loss (MOSFET turn-ON loss, turn-OFF loss and SBD recovery loss) of SiC power modules is measured to be about 30% of that of Si-IGBT modules under the generally-used switching condition (di/dt ~250A/μs). The three losses of SiC modules decrease monotonically with a decrease in gate resistance, namely switching speed. The result shows the potential of unipolar device SiC power modules.

High Power-Density SiC Converter

A compact SiC converter having power densities about 9 W/cm3 is designed and fabricated. It is confirmed that the converter operates in a thermally permissive range. The power loss of the module of the converter measured under motor operations is less than 50% of the similar-rating Si module loss. The shrink of the effective volume of DC-link capacitor is necessary to achieve the high power-density SiC converter, in addition to the decrease of the cooling system volume due to the loss reduction caused by SiC devices.