Toru Chiba

An Automatic Routing Scheme for General Cell LSI

An automatic routing scheme intended dedicatedly for general cell LSI is described, which is constructed of a number of algorithms such as for net ordering, global routing, and detailed routing. This scheme is distinctive in that channel constraint loops are broken automatically at the stage of global routing, and a grid-free routing scheme is employed at the state of detailed routing. The routing program based on this scheme has been incorporated into a design system for LSI which is at work in practice. A part of implementation results are also shown.

SHARPS: A Hierarchical Layout System for VLSI

A hierarchical layout system for VLSI provided with placement and routing facilities is described, highlighting the routing scheme constructed on the basis of a channel router. Several implementation results are also shown to reveal how much the system has potentialities to be of great use in the practice of layout design of full custom LSIs.

ASK digital demodulation scheme for noise immune infrared data communication

A high performance architecture is proposed for the ASK (Amplitude Shift Keying) digital demodulation, which is dedicated to the noise immune wireless infrared data communication. In this architecture, an infrared subcarrier detected by a photodetector is digitized into TTL interface level pulses, and the digitized subcarrier is demodulated by a 1‐bit digital demodulator. To improve the noise immunity against fluorescent lamps, the optical noises from the lamps are analyzed and the behavior of an ASK infrared communication link is modeled under these noises. On the basis of this model, a digital demodulator is synthesized by means of a high level synthesis tool, aiming at implementing an algorithm of discriminating the subcarrier from optical noises. A part of experimental results shows that the ASK receiver realized with the use of this digital demodulator can achieve an error free infrared link even under the intense noises from fluorescent lamps.

A Placement Algorithm for Polycell LSI and its Evaluation

An automatic placement algorithm for standard cell and polycell LSI is described, which is constructed on the basis of heuristics for a set of interrelated placement subproblems. The algorithm is incorporated into a hierarchical layout system intended not only for standard cell and polycell LSI but for general cell LSI, by which standard cell and polycell LSI have begun to be laid out in practice. A part of implementation results are also shown to reveal how high the layout performance of the placement program.

Synthesis and simulation of digital demodulator for infrared data communication

A high performance design methodology is described for a digital demodulator, which is intended for the noise immune wireless infrared data communication. In this methodology, ASK (Amplitude Shift Keying) infrared signals detected by a photo detector are digitized into two logic-level pulses by an infrared receiver, and the demodulation of the digitized signals is implemented by a new architecture. On account of the interference with optical noises from fluorescent lamps, an ASK receiver is realized by a 1-bit digital demodulator, which is designed with use of a high level synthesis tool COMPASS so as to implement an algorithm for removing the noises. A part of experimental results is also shown to demonstrate the practicability.

Error correction block based ARQ protocol for wireless digital video transmission

This paper proposes a new error correction block based hybrid ARQ protocol, in which physical layer packets are formed with the use of multiple error correction blocks, and the retransmission control is performed on the basis of these error correction blocks. This protocol is designed dedicatedly for mobile AV stations to provide high quality digital video transmission through a radio channel. To analyze the performance of this protocol, numbers of asymptotic and simulation values of the frame loss rate versus the uncorrectable error probability are calculated, in comparison with the performance of the ordinary packet based retransmission control.

An Automatic Routing System for High Density Multilayer Printed Wiring Boards

Recent advances in the packaging technology of microelectronics have changed the design rules for printed wiring boards (PWBs) such that the number of wiring tracks between adjacent pins of an ordinary dual in line package (DIP) is allowed to be two or more, and the number of signal layers to be laminated is often required to be four or more. When the packaging density or scale of a PWB augments to such an extent, conventional routing schemes are confronted with various difficulties. The present paper describes a new routing system which can cope with such high density PWBs, for which the maximum numbers of layers to be laminated, circuit modules to be mounted, and signal nets are admitted up to 16, 2,000 and 4,000, respectively. The system described operates on a PDP 11/34 computer coupled with a TEKTRONIX 4014 graphics terminal. A set of implementation results are also shown to reveal how much the described system contributes to the reduction of time and labor incurred in laying out multilayer PWBs of high density.

Implementation of wireless MPEG2 transmission system using IEEE 802.11b PHY

A new error correction block based hybrid ARQ protocol, in which PHY layer packets are composed of multiple error correction blocks, is devised together with a retransmission control scheme constructed on the basis of these error correction blocks. A wireless video transmission system using IEEE802.11b PHY is also described, which has been developed with the use of a medium access control (MAC) LSI to perform the proposed protocol.

Low power architecture for high speed infrared wireless communication system

A high performance and low power architecture is devised for a 4 Mbps infrared wireless communication system dedicated to mobile computing. In this architecture 4PPM (4-Pulse Position Modulation) infrared signals detected by an infrared receiver are digitized into TTL interface level pulses, and the digitized pulses are demodulated by a 1-bit digital demodulator. To extend the range of the link length, a 4PPM demodulator is synthesized to implement a demodulation algorithm which is constructed so as to accommodate the output tolerance of the infrared receiver. A experimental results show that the proposed 4 Mbps infrared communication system can achieve an error free link in the range of 0-140 cm at power consumption of 245 mW and 65 mW for transmitting and receiving, respectively. The communication controller is integrated in a 0.6 /spl mu/m CMOS standard-cell chip, which contains 10,015 transistors on a 12 mm/sup 2/ die.

4 Mbps infrared wireless link dedicated to mobile computing

A high performance and low power architecture is devised for a 4 Mbps infrared wireless communication system dedicated to the mobile computing. In this architecture, 4PPM (4-pulse position modulation) infrared signals detected by an infrared receiver are digitized into TTL interface level pulses, and the digitized pulses are demodulated by a 1-bit digital demodulator. To improve the dynamic range of the link length, a 4PPM demodulator is synthesized to implement a demodulation algorithm which is constructed so as to accommodate the output tolerance of the infrared receiver. A part of experimental results shows that the realized 4 Mbps infrared communication system can achieve an error free link in the range of 0-140 cm at 90 mW power consumption. The communication controller is integrated in a 0.6 /spl mu/m CMOS standard-cell chip, which contains 10,015 transistors on a 12 mm/sup 2/ die.