Tsuyoshi Sakata

An 85-mV input, 50-µs startup fully integrated voltage multiplier with passive clock boost using on-chip transformers for energy harvesting

A fully integrated voltage multiplier with low startup voltage (VSTART) and fast startup is developed for the energy harvesting (e.g. thermoelectric energy harvester). The generation of the high frequency clock signal with large amplitude without using off-chip components is a key to achieve the voltage multiplier. The proposed passive clock boost using two on-chip transformers with the winding turns ratio of three reduces VSTART. The 138-MHz clock generation with a fully integrated LC oscillator enables the fast startup. The voltage multiplier fabricated in 65-nm CMOS achieves the lowest cold VSTART of 85mV in the published fully integrated voltage multiplier and the shortest startup time of 50μs.

Fully considered layout variation analysis and compact modeling of MOSFETs and its application to circuit simulation

We have developed a total system of circuit design to treat dependency of MOSFET electric characteristics on layout patterns. Our new methodology with two-step multivariate analysis realizes highly reliable compact modeling, and its application to SPICE simulation significantly improves accuracy of circuit modeling. Our system is a powerful tool of design for manufacturing in 65 nm technology node and beyond.