Tzu-Ning Fang

Non-volatile resistive switching for advanced memory applications

A non-volatile resistive switching mechanism based on trap-related space-charge-limited-conduction (SCLC) is proposed. Excellent memory characteristics have been demonstrated using near-stoichiometric cuprous oxide (CuxO) metal-insulator-metal (MIM) structures: low-power operation, fast switching speed, superior temperature characteristics, and long retention. This MIM memory cell is fully compatible with standard CMOS process. The proposed switching mechanism is a strong contender for high density and low cost memory applications

Switching characteristics of Cu2O metal-insulator-metal resistive memory

The Cu2O metal-insulator-metal (MIM) resistive switching memory was characterized on a 64kb memory test array. The switching properties are consistent with the proposed switching model of conductivity modulation by a charge trapping process. Retention, programing characteristics, and temperature effects are analyzed based on the switching model. The measured characteristics and the switching model for Cu2O MIM are compared with those of other resistive switching materials. The statistical characteristics provide essential evidence for analysis of the switching mechanism and evaluation of the memory devices.

Erasing characteristics of Cu2O metal-insulator-metal resistive switching memory

The erasing characteristics of Cu2O metal-insulator-metal resistive switching memory were measured on a 64Kb memory test array. The erasing yield reaches the maximum at an optimal erasing voltage. Effective erasing requires a threshold current compliance that is higher for shorter pulse width. The erasing current and erasing power both depend strongly on the on-state before erasing, while the erasing voltage is essentially unaffected. Erasing appears to be a power-driven process, which may be related to the thermal effect of power dissipation. The experimental data and analysis suggest that erasing can be explained by field-assisted thermal emission of trapped charges.

Erase Mechanism for Copper Oxide Resistive Switching Memory Cells with Nickel Electrode

A metal-insulator-metal (MIM) device based on a Cu2O insulator has electrical characteristics significantly dependent on the oxide to top electrode (TE) interface. Cu/Cu2O/TE devices with various top electrodes have different thermal release characteristics, related to trap depth. The behavior of the device during erase with Ni and Ti top electrodes suggests different mechanisms. This paper focuses on Cu/Cu2O/Ni devices and proposes a thermal erase model, based on power calculations and temperature dependence

Session 12: Memory technology - resistive memory and magnetic memory

Most updated progress in resistive memory is presented in the first part of this section. In the first paper, Dr. Waser presents the review of mechanism of resistive switching. Highly reliable ReRAM based on TaO x has exhibited the endurance over 109 cycles and 10 years retention at 85°C. With a thin reactive Ti buffer layer in HfO 2 based ReRAM, the operation current can be further reduced down to 25mA. Physical set/reset models of NiO ReRAMs is proposed to evaluate the retention and disturb. Next part of the section is related to magnetic memory. Statistical study of spin-torque-transfer-MRAM exhibits the feasibility of 64Mbit chip at the 90-nm node. With a perpendicular TMR, the low switching current of 49μA and the high switching speed of 4 nsec are demonstrated.