Valeriya Kilchytska

Substrate Effects on the Small-Signal Characteristics of SOI MOSFETs

The present paper investigates the influence of the silicon substrate on the AC characteristics of fully-depleted (FD) and partially-depleted (PD) silicon-on-insulator (SOI) MOSFETs. For the first time it is shown that the presence of the substrate underneath the buried oxide results in two transitions (i.e. zero-pole doublets) in the output conductance vs frequency characteristics, depending on the space-charge conditions at the buried oxide-substrate interface. The paper discusses the analytical device modelling to include the influence of the substrate in CAD circuit simulations.

MOSFETs scaling down: advantages and disadvantages for high temperature applications

With technology advances into deep submicron era, new physical phenomena appear and the relative importance of existing phenomena for high-temperature behaviour can change. This paper is focused on the influence of scaling down technology, particularly the decrease in gate oxide thickness and the increase in doping levels on the high-temperature characteristics of SOI and bulk MOSFETs. By examining different device properties, major evolutions in high-temperature behaviour with regards to previous device generations have been identified.

Effects of high-energy neutrons on advanced SOI MOSFETs

This work discusses the degradations caused by high-energy neutrons in advanced MOSFETs and compares them with damages created by γ-rays reviewing the original researches performed in our laboratory during last years [1-6]. Fully–depleted (FD) Silicon-on-Insulator (SOI) MOSFETs and Multiple-Gate (MuG) FETs with different geometries (notably gate lengths down to 50 nm) have been considered. The impact of radiation on device behavior has been addressed through the variation of threshold voltage (VT), subthreshold slope (S), transconductance maximum (Gmmax) and drain-induced barrier lowering (DIBL). First, it is shown that degradations caused by high-energy neutrons in FD SOI and MuG MOSFETs are largely similar to that caused by γ-rays with similar doses [1,3]. Second, it is revealed that, contrarily to their generally-believed immunity to irradiation [7, 8], very short-channel MuGFETs with thin gate oxide can become extremely sensitive to the total dose effect [2,3]. The possible reason is proposed. Third, a comparative investigation of high-energy neutrons effects on strained and non-strained devices demonstrates a clear difference in their response to high-energy neutrons exposure [6]. Finally, based on simulations and modeling of partially –depleted (PD) SOI CMOS D Flip-Flop, we show how radiation-induced oxide charge and interface states build-up can affect well-known tolerance of SOI devices to transient effects [4,5].

Electrical properties of FinFET structures

Electrical properties of FinFET (fin field-effect-transistor) structures are investigated. These structures are considered to be the most promising candidates for the creation of nano-scale metal-oxidesemiconductor (MOS) devices and integrated circuits due to strong suppression of the short-channel effects. The impact of the structure dimensions on the characteristics of the transistors is studied. Particular attention is given to the carrier mobility in the inversion channel of FinFET structures.