Vivek Sridharan

Trend from ICs to 3D ICs to 3D systems

Moores Law has driven the IC industry to a billion transistor chip. But major technical and financial barriers are foreseen beyond 32 nm. One alternative path to this challenge seems to be stacked 3D ICs. But 3D ICs are a small part of any system and the total benefits of miniaturization cannot be realized until the entire system is miniaturized. This is the basis of 3D systems, the focus of this paper. The 3D miniaturization technologies briefly described in this paper include Si or wafer level interposers with Through-Package-Vias (TPV), nano-scale passives, thermal materials and interfaces and fine pitch system interconnections.

Chip-last embedded actives and passives in thin organic package for 1–110 GHz multi-band applications

This paper presents for the first time a novel manufacturing-compatible organic substrate and interconnect technology using ultra-thin chip-last embedded active and passive components for digital, analog, MEMS, RF, microwave and millimeter wave applications. The architecture of the platform consists of a low-CTE thin core and minimum number of thin build up organic dielectric and conductive layers. This organic substrate is based on a new generation of low-loss and thermally-stable thermosetting polymers (RXP-1 and RXP-4). Unlike LCP- and Teflon-based materials, the RXP material system is fully compatible with conventional FR-4 manufacturing processes. Ultra-thin silicon test die (55µm thick) has been embedded in a 60µm deep cavity with a 6-metal layer RXP substrate and a total thickness of 0.22mm. The embedded IC is interconnected to the substrate by ultra-fine pitch Cu-to-Cu bonding with polymer adhesives. This novel interconnection process performed at 180°C, has passed 1,000 thermal shock cycles in reliability testing. Because of manufacturing process simplicity and unparalleled set of benefits, the chip-last technology described in this paper provides the benefits of chip-first without its disadvantages and thus enables highly miniaturized, multi-band, high performance 3D modules by stacking embedded 3D ICs or packages with embedded actives, passives and MEMS devices.

Design and fabrication of bandpass filters in glass interposer with through-package-vias (TPV)

This paper presents the integration of WLAN (2.4 and 5GHz) bandpass filters in glass interposer using through-package vias. The filters include novel embedded passive components such as stitched capacitors with reduced shunt parasitics and via-based inductors that provide area reduction. The filters designed for 2.4 GHz showed an insertion loss of less than 2dB and better than 15dB return loss, while the 5GHz filters showed an insertion loss of less than 1dB with better than 20dB return loss. Stop-band rejection of over 35dB was observed at 2.2 GHz on the 2.4 GHz bandpass filters. The measured results showed good agreement with the simulated values and indicated that the performance on glass interposer closely matches the performance of the more expensive high resistivity silicon with similar properties.

Enhancing Signal and Power Integrity Using Double Sided Silicon Interposer

A novel double sided silicon interposer for low impedance power delivery is presented. In this letter, a model for power ground planes in inhomogeneous dielectrics with conductive subsections using the multi-layered finite difference method (M-FDM) is presented. Benefits of the silicon interposer in mitigating signal integrity issues arising due to return path discontinuities (RPDs) are also discussed for the first time along with a comparison to glass interposer.

Filter integration in ultra thin organic substrate via 3D stitched capacitor

This paper presents filters integrated in ultra thin multilayer organic substrate using 3D stitched capacitor alleviating shunt parasitics and providing tunable capacitors. Insertion loss of less than 2.2dB, return loss of greater than 15dB at 2.4 GHz and attenuation of greater than 30dB below 2.0 GHz and at 4.7 GHz were measured. The measured results showed good agreement with simulated results. This paper demonstrated 2.4 GHz bandpass filters with size of 2.2mm × 3.0mm × 0.2mm (1.2mm3) in ultra thin organic RXP substrate.

Modeling and design of an ultra-miniaturized WLAN sub-system with chip-last embedded PA and digital dies

System integration by die-embedding within electronic packages offers significant advantages in miniaturization, cost and performance for mobile devices. This paper presents the functional design and analysis of ultra-thin packages that combine embedded actives (GaAs Power Amplifier and a baseband digital IC) with embedded passives (band-pass filters), leading to an ultra-miniaturized WLAN sub-system. This chip-last design routes embedded dies in the outer build-up layer, using Embedded MEMS Actives and Passives (EMAP) technology being developed in the Georgia Tech PRCs industry consortium, as an alternative, lower cost approach over current chip-first and chip-middle methods. Electromagnetic (EM) simulations were performed in order to tune the electrical performance of interconnections based on die specifications and package configuration. The digital package was designed with multiple power-ground pair islands to enhance noise isolation, while improving overall signal and power integrity. The embedded module designs for RF transmitter and the baseband IC measure at 2.8mm × 3.2mm × 0.25mm and 10mm × 10mm × 0.25mm respectively, achieving over 4.5× volume reduction compared to existing wire-bond packages.