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Dive into the research topics where Wayne Irving Kinney is active.

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Featured researches published by Wayne Irving Kinney.


Archive | 1984

Method of fabricating silicon-on-insulator transistors with a shared element

John Robert Abernathey; Wayne Irving Kinney; Jerome B. Lasky; Scott Richard Stiffler


Archive | 1984

Method of manufacturing semiconductor structures having an oxidized porous silicon isolation layer

Wayne Irving Kinney; Jerome B. Lasky; Larry Alan Nesbit


Archive | 1984

Process of making dual well CMOS semiconductor structure with aligned field-dopings using single masking step

Wayne Irving Kinney; Charles W. Koburger; Jerome B. Lasky; Larry Alan Nesbit; Ronald R. Troutman; Francis Roger White


Archive | 1985

Silicon-on-insulator transistors

John Robert Abernathey; Wayne Irving Kinney; Jerome B. Lasky; Scott Richard Stiffler


Archive | 1985

PROCESS OF MAKING DUAL WELL CMOS SEMICONDUCTOR STRUCTURE

Wayne Irving Kinney; Charles W. Koburger; Jerome B. Lasky; Larry Alan Nesbit; Francis Roger White; Ronald R. Troutman


Archive | 1985

METHOD OF FORMING A SEMICONDUCTOR STRUCTURE HAVING DIELECTRICALLY ISOLATED MONOCRYSTALLINE SILICON REGIONS

Wayne Irving Kinney; Jerome B. Lasky; Larry Alan Nesbit


Archive | 1985

Silicon-on-insulator transistor.

John Robert Abernathey; Wayne Irving Kinney; Jerome B. Lasky; Scott Richard Stiffler


Archive | 1985

Verfahren zum herstellen einer zwei-wannen-cmos-halbleiterstruktur. A method of manufacturing a two-well CMOS semiconductor structure.

Wayne Irving Kinney; Charles W. Koburger; Jerome B. Lasky; Larry Alan Nesbit; Francis Roger White; Ronald R. Troutman


Archive | 1985

A method of manufacturing a two-well CMOS semiconductor structure.

Wayne Irving Kinney; Charles W. Koburger; Jerome B. Lasky; Larry Alan Nesbit; Francis Roger White; Ronald R. Troutman


Archive | 1985

Silizium-auf-isolator-transistor. Silicon-on-insulator transistor.

John Robert Abernathey; Wayne Irving Kinney; Jerome B. Lasky; Scott Richard Stiffler

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