Wei Gai
Chinese Academy of Sciences
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Featured researches published by Wei Gai.
international conference on electronic packaging technology | 2013
Gaowei Xu; Shuangfu Wang; Chunsheng Zhu; Jiaotuo Ye; Wei Gai; Le Luo
Warpage is one of the challenging problems for wafer level package (WLP). Especially, the bonding process of multiple wafers will bring additional stress to WLP and warpage of WLP. This paper aims at the stress and warpage characteristics of the WLP (consisting of silicon cover wafer and silicon MEMS wafer) with glass frit bonding. The finite element (FE) method and MOS (Multi-beam Optical Sensor) technology were used. Simulation result indicated that WLP presents almost zero warpage. MOS measurement result indicated that WLP actually presents convex warpage instead of zero warpage. It turned out that the convex warpage results from the temperature difference between WLP wafers (i.e. cover wafer and MEMS wafers) in the course of post-bond cooling. Taken the temperature difference into account, the simulation result was consistent with experiment results. Furthermore, on the basis of the convex warpage value the stress of WLP was also calculated so as to understand the stress distribution and estimate the reliability level of the MEMS device.
international conference on electronic packaging technology | 2017
Wenhua Wang; Tao Zheng; Weibo Zhang; Wei Gai; Le Luo; Gaowei Xu
X-band microstrip filters (f0=8.6GHz, FBW=9%) based on the half wavelength microstrip resonator on the high-resistance silicon wafer with new TSV shielding structure were presented. Furthermore, low permittivity and low dissipation factor benzocyclobutene (BCB) was used as dielectric to reduce filter loss. Considering the transmission loss of microstrip, the influence of the resonator order, filter structure, dielectric thickness and structure parameters of the TSV with shielding structure were simulated and optimized respectively with electromagnetic simulation software HFSS. Simulation results show that the X-band filters with optimized parameters have lower insertion loss ranged from 1 dB to 2.5 dB, higher return loss ranged from 13 dB to 19dB. The insertion loss only increases by 0.2dB if integrated with optimized shielding TSV.
international conference on electronic packaging technology | 2017
Gong Cheng; Wei Gai; Gaowei Xu; Le Luo
Wafer level chip scale package is becoming the mainstream of package form for the chip used in mobile devices due to its low cost and small form factor. The redistribution layer composed of copper-PI composite usually causes severe wafer warpage, and the plastic deformation of copper during heating processes plays an important role. In order to reduce the wafer warpage brought by the copper layer, the method of cooling the copper thick film/Si composite to extremely low temperatures (−196°C, by liquid nitrogen) is proposed, and after this process, the warpage is reduced by 65% and 93.5% for passivated Cu and blank Cu films, respectively. The thermomechanical response below ambient temperature is deduced according to the measured results and the module based on linear temperature-dependent diffusion energy Q. A clear linear stress recovery is detected during the initial heating, which indicates an obvious stress relaxation occurred soon after the samples are taken out of liquid nitrogen.
international conference on electronic packaging technology | 2017
Gaowei Xu; Wei Gai; Le Luo; Shulin Zhang; Xiaoming Xie
The warpage, vibration mode, frequency response characteristics and their impact on mobile noise of planar SQUID (Superconducting quantum interference device) gradiometer were studied and evaluated by using mechanical simulation and experiment methods. Firstly, ANSYS static mechanical method was used to simulate the stress and deformation of SQUID with various adhesive bonding methods. The correlation between warpage and unbalance was also set up. On this basis, modal analysis method was used to study the vibration modes and frequency response characteristic as well as their dynamic effect on unbalance of gradiometer. Secondly, by means of magnetic measurement the static unbalance as well as response of the planar SQUID gradiometer with various packaging parameters were performed. Compared the simulation results with the experiment, warpage and its impact on unbalance of planar SQUID gradiometer were validated.
Scientific Reports | 2017
Gong Cheng; Heng Li; Gaowei Xu; Wei Gai; Le Luo
Nanotwinned copper (nt-Cu) shows a broad application prospects as interconnection materials in integrated circuit industry, since it combines the excellent mechanical and electrical properties. However, the formation and growth behavior of twin lamellae in pulse electrodeposited copper films are not fully understood. In this work, a series of electroplated copper films are prepared by verifying the electroplating parameters and the microstructures are analyzed using scanning electron microscope (SEM) and transmission electron microscope (TEM). The surface morphology indicates strong evidence of stacked twin terraces and layers, suggesting that nanotwins grow up layer by layer. Combined with in situ characterization by SEM and molecular dynamics (MD) simulation, it is proved that the terraces originate from the triple junction of grain boundaries and grow up by extending along the lateral (111) crystal plane. A twin terrace-growing model for nt-Cu is then deduced, which distinguishes from deformation twins or annealed twins. This growth model would be prospective to help obtain high quality of nt-Cu in industry.
international conference on electronic packaging technology | 2016
Gaowei Xu; Wei Gai; Tao Zheng; Defeng Liang; Le Luo; Juying Chen
A kind of integration node with six-microphone array for wireless sensor network (WSN) using 3D-SiP technology was developed. The node includes sensing module, communication module, battery compartment and node case. Communication and sensing modules were stacked by using vertical interconnections (including stand-off and stamp-hole) method. The sensing module contains six MEMS microphones and corresponding sound signal processing chips, master chip of signal processing, etc. On-line test result showed that the fabricated node has good performances, i.e. target recognition and classification. Vibration and shock test results showed that the integrated node has good reliability and environmental adaptability.
international conference on electronic packaging technology | 2014
Gaowei Xu; Chunsheng Zhu; Jiaotuo Ye; Heng Li; Wei Gai; Le Luo
Warpage issue of wafer level package (WLP) has caught the attention of WLP industry. This paper aims at the warpage characteristics and optimization of the WLP (consisting of silicon MEMS wafer and silicon cover wafer) with glass frit bonding. Finite-element method (FEM) was used to study the warpage and stress optimization of the Si-Si bonding WLP. Some factors which affect WLP warpage, such as CTE (coefficient of thermal expansion) and Youngs modulus of glass frit, ring thickness & width of glass frit and bonding temperature etc. were optimized. The stress of WLP was also calculated and the reliability level of the MEMS device was estimated. It turned out that CTE and Young modulus of glass frit are the key parameters for decreasing WLP warpage and stress and promoting the MEMS WLP. Ring width of glass frit and the thickness of silicon cover plate wafer have little impacts on WLP stress and warpage. With the optimized parameters taken into account, the stress in MEMS WLP falls down. Those optimization results have been put into actual WLP manufacture.
international conference on electronic packaging technology | 2013
Wei Gai; Gaowei Xu; Le Luo
The technology of electroless Ni/Au UBM and laser jetting solder are attractive in flip chip package for its low-cost and flexibility. In this study, the solder ball was bumped on electroless Ni/Au UBM through laser jetting technology. Scanning Electron Microscope (SEM) was used to investigate the pad surface morphology after electroless Ni/Au deposition. The deposition itself was isotropic, and a smooth nickel surface was obtained. The die shear test was conducted to investigate the correlation between the thickness of electroless Ni and shear force. With the increase of electroless Ni thickness, the shear force was much improved. With the thickness of electroless Ni being 5.4um and 7.7um respectively, the failure occurred at the interface of sold joint and substrate. In such cases, the interface stress at electroless Ni layer and pad was comparatively small. Hence the interconnect kept highly reliable. The die shear force achieved 2.8Kg with electroless Ni thickness of 5.4um, more than the requirement of 2.5Kg by MIL-STD-883H.
international conference on electronic packaging technology | 2018
Gong Cheng; Gaowei Xu; Wei Gai; Le Luo
international conference on electronic packaging technology | 2018
Zhenggao Hu; Weibo Zhang; Wei Gai; Yaming Wu; Gong Cheng; Gaowei Xu