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Featured researches published by Wen-Fa Tsai.
international semiconductor device research symposium | 2011
Chen-Chien Li; Kuei-Shu Chang-Liao; Chung-Hao Fu; Te-Hsuen Tzeng; Tien-Ko Wang; Wen-Fa Tsai; Chi-Fong Ai
Metal oxide semiconductor field effect transistors (MOSFET) with SiGe channel and higher-k gate dielectric are studied in this work. Samples with TaON/HfO2 or TiON/HfO2 stacks show larger drain current, transconductance, and smaller subthreshold swing than that with single HfO2 layer. In addition, the reliability of SiGe MOSFET device is clearly improved with TaON/HfO2 stacks in terms of degradation of Gm and Vth after hot-carrier stress. The integration of SiGe channel with TaON/HfO2 higher-k dielectric is useful for high-performance MOSFETs.
international semiconductor device research symposium | 2009
Chung-Hao Fu; Kuei-Shu Chang-Liao; Li-Wei Du; Tien-Ko Wang; Wen-Fa Tsai; Chi-Fong Ai
Metal-oxide-semiconductor devices with SiGe channel and nitridation treatment using plasma immersion ion implantation (PIII) were studied in this work. The reliability in terms of stress-induced leakage and stress-induced Vfb shift is improved for device with a PIII treatment. The EOT value of MOS device can be reduced to 9.6 Å by employing 30% Ge content in SiGe channel and PIII nitridation.
IEEE Transactions on Electron Devices | 2008
Chang-Ta Yang; Kuei-Shu Chang-Liao; Hsin-Chun Chang; Chung-Hao Fu; Tien-Ko Wang; Wen-Fa Tsai; Chi-Fong Ai; Wen-Fa Wu
To continuously improve device performance with the shrinkage of device dimension, some novel devices like fully depleted silicon-on-insulator and symmetric double-gate transistor have been proposed. Various Hf<sub>x</sub>Ta<sub>y</sub>Si<sub>z</sub>N metal gate electrodes were developed in this paper to achieve work function near the midgap and excellent thermal stability. Furthermore, this paper also demonstrated a good metal gate candidate, Hf<sub>0.19</sub>Ta<sub>0.41</sub>Si<sub>0.26</sub>N<sub>0.14</sub>, possessing excellent electrical performances in hysteresis effect, interface trap density, stress-induced leakage current, and excellent thermal stability as well.
international semiconductor device research symposium | 2007
Chung-Hao Fu; Kuei-Shu Chang-Liao; H.C. Chuang; Tzu-Chen Wang; Sung-Wei Huang; Wen-Fa Tsai; Chi-Fong Ai
The electrical characteristics of high-k gated MOS devices can be improved by a nitridation treatment using plasma immersion ion implantation (PHI). The suitable process conditions for PHI treatment are at a low ion energy and with a short implantation time.
IEEE Transactions on Electron Devices | 2007
Kuei-Shu Chang-Liao; Chin-Lung Cheng; Chun-Yuan Lu; Bhabani Shankar Sahu; Tzu-Chen Wang; Tien-Ko Wang; Shang-Feng Huang; Wen-Fa Tsai; Chi-Fong Ai
Native oxides at the Si surface on the electrical properties of MOS devices are crucial problems. To study these issues, the thermal stability and electrical characteristics of MOS devices with clustered vertical furnace-grown, native oxide-free, ultrathin gate oxides and Hf xTayN metal gates were investigated. Postmetallization annealing (PMA) was carried out to study the metal-diffusion effects. Time-of-flight secondary ion mass spectroscopy analysis results show that the diffusion depths of Hf and Ta in the gate oxide are small and stay almost constant with a PMA temperature of up to 950 degC. Compared to those with conventional horizontal furnace-grown oxides, MOS devices with advanced clustered vertical furnace-grown gate oxides show excellent electrical characteristics, such as equivalent oxide thickness, hysteresis, interface trap density, stress-induced leakage current, defect generation rate, and stress-induced flat-band voltage shift. With an increase in PMA temperature, the electrical characteristics remain almost unchanged, which, in turn, achieve the excellent thermal stability and electrical reliabilities of MOS devices with clustered vertical furnace-grown gate oxides and Hf0.27Ta0.58N0.15 metal gates
The Japan Society of Applied Physics | 2006
Kuei-Shu Chang-Liao; Ping-Hung Tsai; H.Y. Kao; Tzu-Chen Wang; Sung-Wei Huang; Wen-Fa Tsai; Chi-Fong Ai
treatment using plasma immersion ion implantation (PIII) Kuei-Shu Chang-Liao*, Ping-Hung Tsai, H.Y. Kao, T.K. Wang, S.F. Huang, W.F. Tsai, and C.F. Ai Department of Engineering and System Science, National Tsing Hua University, Hsinchu, Taiwan, R.O.C. Physics Division, Institution of Nuclear Energy Research, Taoyuan, Taiwan, R.O.C. *TEL: (886)-(3)-5742674, FAX: (886)-(3)-5720724, E-mail: [email protected]
Microelectronic Engineering | 2007
Ping-Hung Tsai; Kuei-Shu Chang-Liao; H.Y. Kao; Tzu-Chen Wang; Sung-Wei Huang; Wen-Fa Tsai; Chi-Fong Ai
Solid-state Electronics | 2012
Chen-Chien Li; Kuei-Shu Chang-Liao; Chung-Hao Fu; Te-Hsuen Tzeng; Chun-Chang Lu; Hao-Zhi Hong; Ting-Ching Chen; Tien-Ko Wang; Wen-Fa Tsai; Chi-Fong Ai
device research conference | 2010
Chung-Hao Fu; Kuei-Shu Chang-Liao; Li-We Du; Tien-Ko Wang; Wen-Fa Tsai; Chi-Fong Ai
Microelectronic Engineering | 2009
Li-Jung Liu; Kuei-Shu Chang-Liao; Tai-Yu Wu; Tien-Ko Wang; Wen-Fa Tsai; Chi-Fong Ai