Werner Juengling | Researchain

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Publication

Featured researches published by Werner Juengling.

Archive | 2004

DRAM cells with vertical transistors

Werner Juengling

Archive | 1999

SEMICONDUCTOR PROCESSING METHODS OF FORMING DEVICES ON A SUBSTRATE, FORMING DEVICE ARRAYS ON A SUBSTRATE, FORMING CONDUCTIVE LINES ON A SUBSTRATE, AND FORMING CAPACITOR ARRAYS ON A SUBSTRATE, AND INTEGRATED CIRCUITRY

Werner Juengling

Archive | 2008

DEVICES INCLUDING FIN TRANSISTORS ROBUST TO GATE SHORTS AND METHODS OF MAKING THE SAME

Werner Juengling

Archive | 2002

Metallization line layout

Werner Juengling

Archive | 2002

Semiconductor processing methods of forming a plurality of capacitors on a substrate, bit line contacts and method of forming bit line contacts

Werner Juengling

Archive | 2012

Method and algorithm for random half pitched interconnect layout with constant spacing

Werner Juengling

Archive | 2001

Methods of forming materials between conductive electrical components, and insulating materials

Werner Juengling; Kirk Prall; Ravi Iyer; Gurtej S. Sandhu; Guy T. Blalock

Archive | 2005

Method and apparatus for a self-aligned recessed access device (RAD) transistor gate

Werner Juengling

Archive | 2013

Systems and devices including multi-gate transistors and methods of using, making, and operating the same

Werner Juengling

Archive | 2010

Vertical gated access transistor

Werner Juengling

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Collaboration

Dive into the Werner Juengling's collaboration.

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Richard H. Lane

Micron Technology

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Kirk Prall

Micron Technology

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Howard C. Kirsch

Micron Technology

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Guy T. Blalock

Micron Technology

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Howard E. Rhodes

Micron Technology

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Paul Grisham

Micron Technology

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Tyler A. Lowrey

Micron Technology

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Brent Gilgen

Micron Technology

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Ceredig Roberts

Micron Technology

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Charles L. Ingalls

Micron Technology

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