Xiangkun Yin

Metal Proportion Optimization of Annular Through-Silicon via Considering Temperature and Keep-Out Zone

For annular through-silicon via (TSV)-based 3-D integrated circuits (3-D ICs), a greater TSV metal proportion of annular TSV leads to lower temperature but induces larger keep-out zone (KOZ). In this paper, the figure of merit (FOM) tradeoff model between temperature and KOZ is proposed to obtain the optimal metal proportion of annular TSV. First, the analytical models of the temperature of annular TSV-based 3-D IC and the KOZ induced by annular TSV are given, respectively, and both of them are verified by ANSYS software. Second, based on the analytical models, the FOM model is proposed. Then, the effects of total radius, material, and insertion density of annular TSV on FOM and optimal metal proportion are analyzed in detail. It is concluded that, the optimal metal proportion of annular TSV is approximately 0.3 with large ranges of the total radius and density of annular TSV, and various materials filled in annular TSV.

Effectiveness of

We characterize quantitatively the noise-shielding effect of the p+ layer surrounding through-silicon via (TSV). In time domain, as for the rise time of input signal in picosecond scale, 1) the peak noise induced by TSV with p+ layer at the observe point (OP) is reduced by more than 91.8% compared with that of conventional TSV; 2) for the case without p+ layer, the threshold voltage and saturation current of nMOSFET are changed by as much as 80 mV and 120% due to the TSV-induced noise, respectively; while for the case with p+ layer, there are hardly any disturbance. In frequency domain, the transmission parameter from TSV to OP is decreased by 21~43 dB in the frequency range of 0.1 to 50 GHz, after the p+ layer is added. It is proved that the p+ layer can mitigate the TSV-induced substrate noise effectively for microwave applications.