Xiulong Wu

A Compact Equivalent Circuit Model of HVLDMOS and Application in HIVC Design

In this paper, a novel equivalent circuit of high voltage LDMOS is presented, which can be embedded into SPICE and applied in high voltage integrated circuits design. Compared with the conventional circuit models of LDMOS, this model does not divide the on-state region of LDMOS into a linear region and a saturation region. Consequently, the formulas for the circuit model contain fewer parameters easily extracted. This paper first creates an I-V equation which is not only available in the on-state region but also suitable to the sub-threshold region based on numerical simulation, and then we obtain a very simple equivalent circuit. The method of parameters extraction in the model is also offered in details. In the end we give an application of designing a CMOS inverter and verify it by MEDICI

Analysis of High Voltage LDMOS Power Consumption

According to the high voltage LDMOS macromodel established in previous work, the inverter consists of LDMOS with high resistance drift region was analyzed. A formulation was presented to solve the power consumption of LDMOS power integrated circuits. The results are shown in good agreement with the simulation values by the two-dimensional numerical simulator MEDICI. Finally, a method to reduce circuit power consumption was presented.