Y. Oritsuki

HiSIM-HV: A Compact Model for Simulation of High-Voltage MOSFET Circuits

The completely surface-potential-based MOSFET model HiSIM-HV for high-voltage applications of up to several hundred volts is reviewed, and recently developed new model capabilities are presented. HiSIM-HV enables a consistent evaluation of current and capacitance characteristics for symmetric and asymmetric high-voltage MOSFETs due to a consistent description of the potential distribution across the MOSFET channel as well as the resistive drift regions. The anomalous features, often observed in the capacitances, are explained by large potential drops in the drift regions. Accurate modeling of the overlap region between the gate and drift region is also demonstrated. Different device features based on different device structures are well explained by the geometrical differences.

Quasi-2-Dimensional Compact Resistor Model for the Drift Region in High-Voltage LDMOS Devices

High-voltage (HV) metal-oxide-semiconductor field-effect transistors (MOSFETs) of the laterally diffused metal-oxide-semiconductor (LDMOS) type enable applications over a wide range of bias voltages by optimizing the combined structure of MOSFET and drift region at its drain side. We report a physically accurate compact resistor model of the LDMOS drift region, adapted to the special requirements of the combined structure with a MOSFET. In particular, the reported resistor model captures the effects of the 2-D current flow in the drift region with its complicated bias dependence. The resistor model considers two device-structure-dependent potentials, namely, the internal node potential within the highly resistive drift region and the potential underneath the gate overlap region. The consistent potential-based description over the complete LDMOS device is the key modeling technology for enabling the accurate reproduction of the bias-dependent 2-D current flow and the resulting I-V characteristics for a wide range of structure variations with a small number of only six fitting parameters. The reported quasi-2-D resistor model is implemented in the second-generation Hiroshima-university STARC IGFET Model-High Voltage (HiSIM-HV) compact models for HV MOSFETs and is expected to be useful for both, optimization of LDMOS circuits and devices.

HiSIM-HV: A compact model for simulation of high-voltage-MOSFET circuits

The high-voltage MOSFET model HiSIM-HV is based on the HiSIM (Hiroshima-university STARC IGFET Model) model for conventional bulk MOSFETs [1, 2] and features a consistent potential description across MOSFET channel and drift region. Symmetric and asymmetric device types are covered for up to several 100 V switching capability. Accurate scaling properties for channel and drift-region length as well as channel width are also provided.

Modeling of 2D bias control in overlap region of high-voltage MOSFETs for accurate device/circuit performance prediction

High-voltage MOSFETs enable wide biasrange applications realized only by optimizing the device structure. We have developed the compact model HiSIM_HV 2.0.0, based on the potential distribution in the device, which is useful for both device and circuit optimizations. By considering two device-structure dependent potentials, the internal node potential within the high resistive drift region and the potential underneath the gate overlap region, the model can reproduce I–V characteristics for a wide range of structure variations without additional fitting parameters.

Effect of Impact-Ionization-Generated Holes on the Breakdown Mechanism in LDMOS Devices

The breakdown mechanism in LDMOS devices with high resistive drift region sustaining high-voltage applications is analyzed and explained. Holes generated by the impact-ionization in the drift region are found to hinder the formation of the breakdown condition by increasing the potential underneath the gate-overlap region. This mechanism is modeled and implemented into the compact model HiSIM_HV for circuit simulation. Good agreement of simulated characteristics with 2D- device simulation results has been achieved.

HiSIM-HV: A Scalable, Surface-Potential-Based Compact Model for High-Voltage MOSFETs

The main features of the industry standard compact model HiSIM-HV for high-voltage MOSFETs are described. The basis of HiSIM-HV is a consistent physically correct potential determination in the MOSFET core and the surrounding drift regions, providing the high-voltage capabilities. Consequently, HiSIM-HV can accurately calculate the physical potential distribution in the entire asymmetric LDMOS structure or the symmetric HVMOS structure and determine all electrical and thermal high-voltage MOSFET properties without relying on any form of macro modeling or sub-circuit formulation. Furthermore, HiSIM-HV’s consistent potential-based approach enables the reproduction of all structure-dependent scaling properties of high-voltage MOSFET features with a single global parameter set. The full scaling properties of HiSIM-HV with respect to the MOSFET-core geometry parameters of gate length and gate width as well as the drift-region parameters of drift-region length and drift-region doping are unique among the available compact high-voltage MOSFET models. Continuous development of HiSIM-HV is carried out in cooperation with the international semiconductor industry and improved versions of HiSIM-HV are released 2 times per year through the Compact Modeling Council (CMC).

Modeling of High-Voltage MOSFETs for Device/Circuit Optimization (Invited)

Abstract Specific features of high-voltage MOSFETs and their modeling are summarized based on HiSIM-HV, which has been developed on the basis of HiSIM (Hiroshimauniversity STARC IGFET Model) for bulk MOSFETs. A consistent potential description across MOSFET channel and high resistive drift region is the characteristic feature of the HiSIM models. The HiSIM-HV model covers symmetric and asymmetric device types up to several 100V switching capability with reproduction of accurate scaling properties of the devices.