Yasushi Amamiya
NEC
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Yasushi Amamiya.
IEEE Transactions on Electron Devices | 1995
Hidenori Shimawaki; Yasushi Amamiya; Naoki Furuhata; Kazuhiko Honjo
The present paper describes a new approach to fabricating high performance HBTs with low base resistance. Their base contact resistance is reduced by using MOMBE selective growth in the extrinsic base region-a key process in the fabrication of high-f/sub max/ AlGaAs/InGaAs and AlGaAs/GaAs HBTs. A p/sup +//p regrown base structure, which consists of a 40-nm-thick graded InGaAs strained layer and a heavily C-doped regrown contact layer, is used for the AlGaAs/InGaAs HBTs to reduce both their base transit time and base resistance, while preventing aluminum oxide incorporation at the regrowth interface. An h/sub fe/ of 93, an f/sub T/ of 102 GHz, and an f/sub max/ of 224 GHz are achieved for a 1.6-/spl mu/m/spl times/4.6-/spl mu/m HBT, together with reduced base push-out effects and improved reliability. AlGaAs/GaAs HBTs with an 80-nm-thick uniform base layer that have high f/sub max/ values ranging from 140-216 GHz are also fabricated using the selective growth technique. These results confirm the high potential of the proposed HBTs, especially for microwave and millimeter-wave applications. >
ieee gallium arsenide integrated circuit symposium | 1997
Yasuyuki Suzuki; Hidenori Shimawaki; Yasushi Amamiya; Nobuo Nagano; Takaki Niwa; Hitoshi Yano; Kazuhiko Honjo
Base-band amplifiers have been demonstrated using AlGaAs/InGaAs HBTs with regrown base contacts. The transimpedance amplifier achieved a bandwidth of 49.3 GHz and a transimpedance gain of 43.7 dB /spl Omega/. The Darlington feedback amplifier achieved a bandwidth of 54.7 GHz and a gain of 8.2 dB. These are the widest bandwidths yet reported for lumped-circuit-design amplifiers. These performances suggest the great potential of these amplifiers for use in future optical communication and millimeter-wave applications.
international microwave symposium | 2000
Kenichi Hosoya; Shoji Tanaka; Yasushi Amamiya; Takaki Niwa; Hidenori Shimawaki; Kazuhiko Honjo
This paper reports on a low phase noise 38 GHz-band HBT MMIC oscillator employing a newly proposed transmission line resonator. The achieved phase noise of -114 dBc/Hz at 1 MHz offset is believed to be the lowest reported for millimeter-wave oscillators without a dielectric resonator.
international solid-state circuits conference | 2009
Yasushi Amamiya; Shunichi Kaeriyama; Hidemi Noguchi; Zin Yamazaki; Tomoyuki Yamase; Kenichi Hosoya; Shiro Tomari; Hiroshi Yamaguchi; Hiroaki Shoda; Hironobu Ikeda; Shinji Tanaka; Tsugio Takahashi; Risato Ohhira; Arihide Noda; Kenichiro Hijioka; Akira Tanabe; S. Fujita; Nobuhiro Kawahara
As 40Gb/s optical communication systems enter the commercial stage, the transceiver, which is a key component of these systems, requires lower power dissipation, a size reduction, and a wider frequency range to meet the requirements of several standards, such as OC-768/STM-256 (39.8Gb/s), OTU-3 (43.0Gb/s), and 4×10GbE-LANPHY (44.6Gb/s). 40Gb/s transceivers have already been reported in SiGe-based technology.However, they dissipate more than 10W in total and do not support 39.8-to-44.6Gb/s wide-range operations [1–2]. There have been recent reports on CMOS transceivers, but their speed performance is still less than 40Gb/s and their output signal suffers from large jitter [3–5]. In this paper, 40Gb/s SFI-5-compliant TX and RX chips in 65nm CMOS technology consume 2.8W each. This low power dissipation allows for a small and low-cost plastic BGA package. The TX has a full-rate clock architecture that is based on a 40GHz VCO, a 40Gb/s retiming D-FF, and 40GHz clock-distribution circuits that lead to a low jitter of 0.57psrms and 3.1pspp at 40Gb/s. A 40/20GHz clock-timing-adjustment circuit based on a phase interpolator is used to ensure wide-range error-free operations (BER ≪ 10−12) at 39.8 to 44.6Gb/s. A quadruple loop architecture is introduced in the CDR circuit of the RX, resulting in a 38Gb/s error-free operation (BER ≪ 10−12) at 231−1 PRBS with a low rms jitter of 210fs in the recovered clock.
IEEE Journal of Solid-state Circuits | 2009
Shunichi Kaeriyama; Yasushi Amamiya; Hidemi Noguchi; Zin Yamazaki; Tomoyuki Yamase; Kenichi Hosoya; Shiro Tomari; Hiroshi Yamaguchi; Hiroaki Shoda; Hironobu Ikeda; Shinji Tanaka; Tsugio Takahashi; Risato Ohhira; Arihide Noda; Kenichiro Hijioka; Akira Tanabe; S. Fujita; Nobuhiro Kawahara
A fully integrated 40 Gb/s transmitter and receiver chipset with SFI-5 interface is implemented in a 65 nm CMOS technology and mounted in a plastic BGA package. The transmitter chip provides good jitter performance with a 40 GHz full-rate clock architecture that alleviates pattern-dependent jitter and eliminates duty cycle dependence. The measured RMS jitter on the output is 570 fs to 900 fs over the range of 39.8 Gb/s to 44.6 Gb/s with a 231-1 PRBS pattern. The receiver chip operates over the range of 37 Gb/s to 41 Gb/s. The measured RMS jitter on the recovered clock is 359 fs to 450 fs. By taking advantage of CMOS technology, each chip achieves low power consumption of 2.8 W and full integration of SFI-5 functions, PRBS generators/error checkers, a DPSK precoder/decoder, and control interfaces in a 4.9 × 5.2 mm2 die.
international microwave symposium | 2002
Yasushi Amamiya; Yasuyuki Suzuki; M. Kawanaka; Kenichi Hosoya; Zin Yamazaki; Masayuki Mamada; Hidemasa Takahashi; Shigeki Wada; T. Kato; Y. Ikenaga; Shoji Tanaka; T. Takeuchi; Hikaru Hida
GaAs-based HBTs with an InGaP emitter were used to develop key components of a 40-Gb/s optical receiver: a transimpedance amplifier, a differential main amplifier, and a decision circuit. The frequency response of the transimpedance amplifier was flattened by inserting an RC series circuit at the input stage. As a result, the transimpedance amplifier module produced a well-opened 43-Gb/s eye diagram with 400 mVp-p dynamic range. The differential main amplifier and the decision circuit produced 43-Gb/s eye diagrams with a large dynamic range of 700 mVp-p, which is the first 40-Gb/s demonstration using GaAs-based HBTs. These three ICs are thus applicable to a 40-Gb/s optical receiver.
optical fiber communication conference | 2006
Shigeki Wada; Risato Ohhira; Toshiharu Ito; Jin Yamazaki; Yasushi Amamiya; Hitoshi Takeshita; Arihide Noda; Kiyoshi Fukuchi
We have successfully demonstrated error-free transmission of 43-Gbit/s NRZ WDM signals over a 405-km SMF having a maximum of 15.6-ps DGD with our newly-developed equalizer. The equalizer removes fatal BER-degradations from rapidly time-variant waveform distortions
international microwave symposium | 2003
Yasushi Amamiya; Yasuyuki Suzuki; Jin Yamazaki; A. Fujihara; Shinichi Tanaka; Hikaru Hida
This paper reports the first low (1.5 V) supply voltage D-F/F able to run at a full rate of over 43 Gb/s. The proposed F/F circuitry incorporates parallel current switching together with inductive peaking, a combination that makes it suitable for over-43-Gb/s operation at a supply voltage as low as 1.5 V. The D-F/F, implemented through an InP-HBT process, provided 43 Gb/s error free operation with a large clock phase margin of 232 degrees. Moreover, the D-F/F produced a well-opened 50 Gb/s eye diagram. Power dissipation (P/sub diss/) of the D-F/F core circuit was reduced to 40 mW, which is less than one-tenth that of our conventional D-F/F. The F/F circuitry should help enable development of a low-P/sub diss/ 43 Gb/s full-rate module with a 1.5 V range supply voltage, which can be seamlessly connected with high-speed CMOS I/O circuits.
IEEE Transactions on Electron Devices | 1998
Shinichi Tanaka; Yasushi Amamiya; Seiichi Murakami; Hidenori Shimawaki; Norio Goto; Y. Takayama; Kazuhiko Honjo
Critical design issues involved in optimizing millimeter-wave power HBTs are described. Gain analysis of common-emitter (CE) and common-base (CB) HBTs is performed using analytical formulas derived based on a practical HBT model. While CB HBTs have superior maximum-gain at very high frequencies, their frequency limit is found to be determined by the carrier transit time delay. Thus, to fully exploit the potential gain in a CB HBT, it is essential to maintain a high f/sub T/ even at high collector voltages. The advantage of using CB HBTs in a multifingered device geometry is also discussed. Unlike CE HBTs, CB HBTs are capable of maintaining a high gain even if the device size is scaled up by increasing the number of emitter-fingers. Moreover, it is found that reducing the wire parasitic capacitance allows emitter ballasting resistance to be used without affecting the gain. Fabrication of HBTs based on these design considerations led to excellent power performance in a CB unit-cell HBT at 25-26 GHz, featuring output power of 740 mW and power-added efficiency of 42%.
device research conference | 1993
Hidenori Shimawaki; Yasushi Amamiya; Naoki Furuhata; Kazuhiko Honjo
The present paper reports AlGaAs/GaAs and AlGaAs/InGaAs heterojunction bipolar transistors (HBTs) with excellent microwave performance. An fT of 102 GHz and an fof 224 GHz are achieved, using selective growth of heavily C-doped GaAs layers in exmnsic base regions, in combination with a 40-nm-thick compositionally-graded-InGaAs base structure. These are by far the highestf, andfever reported for HBTs fabricated with selective growth.