Yasushi Gohou

A 0.9 V 1T1C SBT-based embedded non-volatile FeRAM with a reference voltage scheme and multi-layer shielded bit-line structure

A 1T1C embedded FeRAM operates at an ultra low voltage of 0.9 V with 550 ns access even after 10 years of imprint degradation. The ultra low voltage operation and high-reliability characteristics are attained by using a reference-voltage scheme and a multi-layer shielded bit-line structure.

Embedded ferroelectric memory technology with completely encapsulated hydrogen barrier structure

A 0.18-/spl mu/m system LSI embedded ferroelectric memory (FeRAM) operating at a very low voltage has been developed for the first time. The low-voltage operation has been attained by newly developed stacked ferroelectric capacitors completely encapsulated by hydrogen barriers, which enable us to eliminate hydrogen reduction of the ferroelectric thin film during the back end of the line process including FSG, tungsten CVD (W-CVD), and plasma CVD SiN (p-SiN) passivation. A fabricated 1-Mbit one-transistor one-capacitor SrBi/sub 2/(Ta/sub x/Nb/sub 1-x/)/sub 2/O/sub 9/ (SBTN)-based embedded FeRAM operates at a low voltage of 1.1 V and ensures the endurance cycles up to 10/sup 12/ at 85/spl deg/C and the data retention time up to 1000 h at 125/spl deg/C, which is the most promising for mass production of 0.18-/spl mu/m low-power system LSI-embedded FeRAM and beyond.

High density and low power nonvolatile FeRAM with non-driven plate and selected driven bit-line scheme

We have successfully developed high density and low power embedded 1Mbit FeRAM. Low operating voltage of 1.5V with ferroelectric capacitor which operates at 0.75V was realized by using technology of (1) non-driven plate scheme with non-refresh operation and (2) selected driven bit-line scheme. The memory core size is reduced down to 53% and the power consumption is reduced to approximately one-fiftieth compared with those of the conventional scheme.