Ying-Yen Chen

Monitoring gate and interconnect delay variations by using ring oscillators

With process variability increasing in advanced processes, it becomes more challenging to diagnose or debug a low-yield problem. For finding out the root causes of a low-yield problem, currently we rely on limited process data provided by foundries or diagnosis tools and physical failure analysis (PFA). Only relying on defect diagnosis analysis and PFA is not sufficient to quickly conclude with a specific process problem. For gathering more information about a process, we propose to embed a process monitor consisting of ring oscillators in a circuit. Our proposed monitor design can monitor both gate and interconnect delay variation. A comprehensive simulation has been conducted and the silicon results will be shown in this paper.

Methodology of generating dual-cell-aware tests

This paper introduces a novel fault model, called the dual-cell-aware (DCA) fault model, which targets the short defects locating between two adjacent standard cells placed in the layout. A layout-based methodology is also presented to automatically extract valid DCA faults from targeted designs and cell libraries. The identified DCA faults are outputted in a format that can be applied to a commercial ATPG tool for test generation. The result of ATPG and fault simulation based on industrial designs have demonstrated that the DCA faults cannot be fully covered by the tests of conventional fault models including stuck-at, transition, bridge and cell-aware faults and hence require their own designated tests to detect.

Predicting Vt variation and static IR drop of ring oscillators using model-fitting techniques

This paper presents a statistical model-fitting framework to efficiently decompose the impact of device Vt variation and power-network IR drop from the measured ring-oscillator frequencies without adding any extra circuitry to the original ring oscillators. The framework applies Gaussian process regression as its core model-fitting technique and stepwise regression as a pre-process to select significant predictor features. The experiments conducted based on the SPICE simulation of an industrial 28nm technology demonstrate that our framework can simultaneously predict the NMOS Vt, PMOS Vt and static IR drop of the ring oscillators based on their frequencies measured at different external supply voltages. The final resulting R squares of the predicted features are all more than 99.93%.

Predicting Vt mean and variance from parallel Id measurement with model-fitting technique

To measure the variation of device Vt requires long test for conventional WAT test structures. This paper presents a framework that can efficiently and effectively obtain the mean and variance of Vt for a large number of DUTs. The proposed framework applies the model-based random forest as its core model-fitting technique to learn a model that can predict the mean and variance of Vt based on only the combined Id measured from parallel connected DUTs. The experimental results based on the SPICE simulation of a UMC 28nm technology demonstrate that the proposed model-fitting framework can achieve a more than 99% R-squared for predicting both of Vt mean and variance. Compared to conventional WAT test structures using binary search, our proposed framework can achieve 42.9X speedup in turn of the required iterations of Id measurement per DUT.

Divide and conquer diagnosis for multiple defects

This paper presents a novel diagnosis technique for multiple defects. This technique proposes a simple heuristic to partition the failures log so that hard-to-detect defects and easy-to-detect defects are likely to be separated. This technique requires only commercial diagnosis software with a simple add-on tool. No customized diagnosis software is needed. Simulations on benchmark circuits demonstrated the effectiveness of the proposed technique. Real silicon experiments on a real industrial product have been verified by physical failure analysis that our technique does not lead to wrong diagnosis for single defect cases.