Yong-Jin Chun

Impact of registration error of reticle on total overlay error budget

As the overlay specification decreases drastically, it is necessary to consider how the total overlay is influenced by each contributing factor. In particular, it is expected that the contribution on overlay error budget can be quantitatively analyzed in terms of the correlation among registration errors of the reticle. The reticle contribution of about 25% is assessed by the breakdown of the sources of overlay metrology uncertainty through the double exposure technique (DET) process. A positive correlation of around 0.7 mitigates the reticle contribution by 180%, compared to the uncorrelated case. In both DET and double patterning technique (DPT) processes, it is needed to positively correlate the registration errors among many reticles in order to decrease the reticle contribution. To maintain the gain of 180% due to positive correlation, the correlation coefficient requisite has to be increased it is difficult to achieve highly positive correlation among more than three reticles. From an integration po...

Optimization of mask manufacturing rule check constraint for model based assist feature generation

SRAF (sub-resolution assist feature) generation technology has been a popular resolution enhancement technique in photo-lithography past sub-65nm node. It helps to increase the process window, and these are some times called ILT(inverse lithography technology). Also, many studies have been presented on how to determine the best positions of SRAFs, and optimize its size. According to these reports, the generation of SRAF can be formulated as a constrained optimization problem. The constraints are the side lobe suppression and allowable minimum feature size or MRC (mask manufacturing rule check). As we know, bigger SRAF gives better contribution to main feature but susceptible to SRAF side lobe issue. Thus, we finally have no choice but to trade-off the advantages of the ideally optimized mask that contains very complicated SRAF patterns to the layout that has been MRC imposed applied to it. The above dilemma can be resolved by simultaneously using lower dose (high threshold) and cleaning up by smaller MRC. This solution makes the room between threshold (side lobe limitation) and MRC constraint (minimum feature limitation) wider. In order to use smaller MRC restriction without considering the mask writing and inspection issue, it is also appropriate to identify the exact mask writing limitation and find the smart mask constraints that well reflect the mask manufacturability and the e-beam lithography characteristics. In this article, we discuss two main topics on mask optimizations with SRAF. The first topic is on the experimental work to find what behavior of the mask writing ability is in term of several MRC parameters, and we propose more effective MRC constraint for aggressive generation of SRAF. The next topic is on finding the optimum MRC condition in practical case, 3X nm node DRAM contact layer. In fact, it is not easy to encompass the mask writing capability for very complicate real SRAF pattern by using the current MRC constraint based on the only width and space restriction. The test mask for this experimental work includes not only typical split patterns but also real device patterns that are generated by in-house model-based assist feature generation tool. We analyzed the mask writing result for typical patterns and compared the simulation result, and wafer result for real device patterns.

Robust approach to determine the optimized illumination condition using process window analysis

Several criteria are applied to optimize the best illumination and bias condition for a layer. Normalized image log-slope (NILS) and mask error enhancement factor (MEEF) are promising candidates to simply decide the optimized condition. NILS represents imaging capability and MEEF represents the mask uniformity influence on wafer image. MEEF has inversely relationship with NILS, but the optimized point of NILS does not exactly coincide with that of MEEF. Besides NILS and MEEF, the depth of focus (DoF) is an important factor for defining the process margin. The process window (PW) is expressed by DoF and exposure Latitude (EL). PW is general parameter used to determine the best lithographic condition. Large EL can be obtained at the condition with good image performance. In order to include mask uniformity effect in PW analysis, the common PW overlapping the final layout with positive and negative biased layouts is adopted. Starting with the minimum NA, sigma and threshold, OPC is performed to satisfy the target layout using aerial image model, and the final OPCed layout is obtained. The positive and negative biased layouts are generated from the final OPCed layout. The bias limit is determined considering mask uniformity. The common PW obtained by overlapping the final layout with positive and negative biased layouts is calculated. Then, NA, sigma and threshold are increased until the maximum values are reached. The common PW at each NA, sigma and threshold value is obtained using the same flow sequence. Comparing among calculated PWs, the NA, sigma and threshold of the maximum PW can be chosen as the best illuminator and bias condition. In this paper, the optimized illumination and bias condition is determined using PW for 60 nm memory device. The process flow is implemented by an OPC tool. By using the OPC tool for the illuminator optimization, the actual layout and multiple monitoring points can be measured. In spite of a large number of calculations, the fast calculation speed can be obtained by using the distributed process.

Three-dimensional mask effect approximate modeling for sub-50-nm node device OPC

In order to perform an optical proximity correction of memory device nodes below half-pitch 50nm, so called 3D mask effects need to be included in a model based OPC. As the mask pitch approaches wavelength of an optical system, and the angle of off-axis illumination becomes increasingly greater than normal incident beam, combined effects of transmission loss and mask induced polarization induces deviations from Kirchhoff thin mask approximation. Presently, just a handful of methods are being developed for commercial use in full-chip scale optical proximity correction: edge domain decomposition method (DDM), rim-type boundary layer and more recently, M3D model [1-6]. However, these methods currently require extensive modeling and proximity correction runtime although its methods are being continously improved for accuracy and speed. In this work, some results on an alternative approach to 3D mask modeling that is suitable for OPC are presented. Using modeling test pattern experimental data and FDTD rigorous simulation results, a thin mask approximation and alternative 3D mask approximate approaches are compared. And the results indicate improved model accuracy in terms of root mean square of 30% for a cross-pole and a dipole illumination conditions, respectively, while the OPC run-time remained similar. Furthermore, a flash memory gate-poly OPC results using the 3D mask approximate model indicates improved correlation to experimental results than a thin mask model at minimum resolution dense feature and narrow space regions. Thin mask and proposed approximate 3D mask models were calibrated for three differing illumination conditions: two X-dipole illuminations with Y-linear polarization and cross-pole quasar illumination with X&Y-linear polarization states. For each of the extreme off-axis illumination conditions, 3D mask approximate model developed for OPC indicated improved calibration results to both test pattern wafer images and rigorous simulation results. In addition, OPC layout image contours of 3D mask approximate model correlated better to wafer image than the thin mask approximation at nominal and defocus conditions.

Stray-light implementation in optical proximity correction (OPC)

It is suggested that stray-light (SL, also called flare, scattered light) impact can be compensated by modifying standard OPC method. Compared to traditional optical proximity effect caused by diffraction limit, stray light leads to extremely long range (~ 100 micrometer ~ 10 millimeter) proximity effect. Appropriate approximation is introduced for stray-light implemented OPC in such a large scale. This paper also addresses other practical problems in the stray-light OPC and presents how to solve the problems.

Virtual OPC at hyper NA lithography

Virtual OPC concept is suggested for soothing the problem that the roadmap of semiconductor devices proceeds the rate of development of exposure tools. Virtual OPC uses the simulated CD data for an OPC modeling instead of the measured CD data. For successful virtual OPC, the extreme accuracy of the simulation is required for obtaining the simulated CD data close to the actual CD values. In this paper, our efforts to enhance the simulation accuracy are presented and the accuracy of simulated sample data for OPC is verified. The applicability of virtual OPC to the production of devices was verified by performing the virtual OPC using the simulated sample data at 1.2 NA lithography and the result also is presented.