Yoshinori Iida
Toshiba
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Featured researches published by Yoshinori Iida.
IEEE Transactions on Electron Devices | 1991
Sohei Manabe; Y. Mastunaga; Akihiko Furukawa; Kensaku Yano; Yukio Endo; Ryohei Miyagawa; Yoshinori Iida; Yoshitaka Egawa; Hidenori Shibata; Hidetoshi Nozaki; Naoshi Sakuma; Nozomu Harada
A highly sensitive 2-million-pixel high-definition charge-coupled device (CCD) image sensor was developed that features an overlaid amorphous silicon photoconversion layer on an interline transfer-type CCD scanner. The device is adapted to the 16:9 aspect ratio. 1125 scanning lines and 2:1 interlace high-definition TV system. A dual-channel horizontal CCD register is used to reduce the operating frequency to one half of the 74.25-MHz readout frequency. A horizontal period signal storage memory (1H line memory) is provided between the vertical CCD register and the horizontal CCD register to provide the signal distribution from the vertical CCD to the horizontal CCD register during the 3.77- mu s short horizontal blanking interval. This device realized a 1000 TV line horizontal limiting resolution 210 nA/1x high sensitivity. Total random noise was found to be 52 electrons RMS and a 72-dB dynamic range was achieved. >
IEEE Transactions on Electron Devices | 2009
Hiroto Honda; Yoshinori Iida; Yoshitaka Egawa; Hiromichi Seki
A color CMOS image sensor with the 4 times 4 White-RGB color filter array (CFA) including 50% white pixels has been developed. A transparent layer has been fabricated on the white pixel to realize over 95% transmission for visible light with wavelengths of 400-700 nm. Pixel pitch and number of the pixels were 3.3 mum and 2 million, respectively. With the simple and low-noise color separation process, low-illumination signal-to-noise ratios of luminance signal have been increased by 6 dB, compared with those of the Bayer pattern. Moreover, by locating the pixels so that every color components can be detected in every column and line, color artifacts at the edge were suppressed. The edge detection process became unnecessary and the process time was reduced by 70%. The new CFA has the potential to significantly increase the sensitivity of CMOS/CCD image sensors.
international solid-state circuits conference | 1994
Hirofumi Yamashita; Michio Sasaki; Shinji Ohsawa; Ryohei Miyagawa; E. Ohba; Nobuo Nakamura; N. Endoh; Ikuko Inoue; Yoshiyuki Matsunaga; Yoshitaka Egawa; Yukio Endo; Tetsuya Yamaguchi; Yoshinori Iida; Akihiko Furukawa; Sohei Manabe; Y. Ishizuka; H. Ichinose; T. Niiyama; Hisanori Ihara; Hidetoshi Nozaki; I. Yanase; Naoshi Sakuma; Takeo Sakakubo; Hiroto Honda; F. Masuoka; S.-I. Sano
Shrinking pixel size in conventional CCD imagers degrades device performance. Unsatisfactory smear noise of -90 dB is attained in a 2/3-inch 2M pixel CCD imager. The STACK-CCD imager has a great advantage regarding this problem. A 100% aperture ratio and low smear noise are maintained regardless of future pixel shrinking, because CCD scanning circuits are overlaid with an amorphous silicon (a-Si) photoconversion layer.<<ETX>>
electronic imaging | 2007
Hiroto Honda; Yoshinori Iida; Go Itoh; Yoshitaka Egawa; Hiromichi Seki
We have developed a CMOS image sensor with a novel color filter array(CFA) where one of the green pixels of the Bayer pattern was replaced with a white pixel. A transparent layer has been fabricated on the white pixel instead of a color filter to realize over 95% transmission for visible light with wavelengths of 400-700 nm. Pixel pitch of the device was 3.3 um and the number of pixels was 2 million (1600H x 1200V). The novel Bayer-like WRGB (White-Red-Green-Blue) CFA realized higher signal-to-noise ratios of interpolated R, G, and B values in low illumination (3lux) by 6dB, 1dB, and 6dB, respectively, compared with those of the Bayer pattern, with the low-noise pre-digital signal process. Furthermore, there was no degradation of either resolution or color representation for the interpolated image. This new CFA has a great potential to significantly increase the sensitivity of CMOS/CCD image sensors with digital signal processing technology.
IEEE Journal of Solid-state Circuits | 1995
Hirofumi Yamashita; N. Sasaki; Shinji Ohsawa; Ryohei Miyagawa; E. Ohba; Keiji Mabuchi; Nobuo Nakamura; Nagataka Tanaka; N. Endoh; Ikuko Inoue; Yoshiyuki Matsunaga; Yoshitaka Egawa; Yukio Endo; Tetsuya Yamaguchi; Yoshinori Iida; Akihiko Furukawa; Sohei Manabe; Y. Ishizuka; H. Ichinose; T. Niiyama; Hisanori Ihara; Hidetoshi Nozaki; I. Yanase; Naoshi Sakuma; Takeo Sakakubo; Hiroto Honda; F. Masuoka; O. Yoshida; Hiroyuki Tango; S. Sano
A 2/3-in optical format 2 M pixel STACK-CCD imager has been developed. The STACK-CCD imager, overlaid with an amorphous silicon photoconversion layer, realizes a large signal charge handling capability of 1.0/spl times/10/sup 5/ electrons, a -140 dB smear noise and a 90 dB dynamic range with a newly introduced device configuration and its unique operation. The 5.0 /spl mu/m(H)/spl times/5.2 /spl mu/m(V) unit pixel imager with sufficiently low image lag has been realized by a novel bias charge injection scheme These device performances are the best ever achieved by a CCD HDTV imager. This is the first such imager satisfying the device performances required for a practical use 2/3-in 2 M pixel HDTV imager. >
IEEE Transactions on Electron Devices | 1991
Hiroaki Hazama; Minoru Takahashi; S. Kambayashi; Masato Kemmochi; Kenji Tsuchiya; Yoshinori Iida; Kensaku Yano; Tomoyasu Inoue; M. Yoshimi; T. Yoshii; Hiroyuki Tango
E-beam recrystallization has been applied to the fabrication of a three-layer processor. The seed structure and the E-beam conditions were successfully optimized so that a large-area SOI as wide as 1 mm was recrystallized without void generation with no damage to underlying devices. The actual SOI area in the device, 850*1100 mu m, was recrystallized with one E-beam scan by aligning its position. The three-layer image processor was capable of visual image sensing with a feature outline extraction in a parallel processing manner. Normal operations of the fundamental functions have been confirmed, demonstrating the feasibility of E-beam recrystallization for three-dimensional IC application. >
international solid-state circuits conference | 1992
Hidenori Shibata; Ikuko Inoue; Ryohei Miyagawa; Hirofumi Yamashita; N. Nohmi; Akihiko Furukawa; Yoshinori Iida; Tetsuya Yamaguchi; Yukio Endo; Yoshiyuki Matsunaga; Sohei Manabe
A 2 Mpixel two-level CCD (charge-coupled device) image sensor which has no capacitive image lag is discussed. Image lag is reduced to 0.4% and the dynamic range expanded from 72 dB to 110 dB. A schematic diagram of this device is shown. The pixel structure adopts an additional storage-diode-resetting gate (SRG) and bias-charge-injecting diode (CID) formed adjacent to a vertical CCD. A single CID is shared by two horizontally adjacent pixels, allowing the charge to be injected into two storage diodes simultaneously.<<ETX>>
Japanese Journal of Applied Physics | 1995
Hidetoshi Nozaki; Naoshi Sakuma; Takako Niiyama; Hisanori Ihara; Yoshiki Ishizuka; Hideo Ichinose; Yoshinori Iida; Michio Sasaki; Sohei Manabe
An Hg-sensitized photochemical vapor deposition method has been developed which has enabled a hydrogenated amorphous silicon photoconversion layer to be overlaid on a charge coupled device (CCD) imager, without a pixel separation structure. This chemical vapor deposition (CVD) method has been used to realize imaging devices with high sensitivity and high resolution for high-definition TV.
Journal of Non-crystalline Solids | 1996
Yoshiki Ishizuka; Tetsuya Yamaguchi; Yoshinori Iida; Hidetoshi Nozaki; Akihiko Furukawa; Hiroyuki Tango; Okio Yoshida
Abstract The influence of gas flow and H 2 dilution ratio on the bulk and surface properties of a-SiC:H films is discussed. Infrared and electron spin resonance studies reveal that structural relaxation is achieved through control of surface reactions. On the other hand, the surface morphology as observed by atomic force microscopy is shown to be determined by growth rate under supply-limited conditions. This evidence implies that an improvement in bulk properties does not always lead to surface smoothening. Both surface reaction control and growth rate control are found to be crucial if films with excellent bulk and surface properties are to be obtained.
Journal of Non-crystalline Solids | 1991
Akihiko Furukawa; Yoshinori Iida; Tetsuya Yamaguchi; Nozomu Harada; Hidetoshi Nozaki; Takaaki Kamimura; Kensaku Yano; Hiroshi Ito; Katsuya Okumura
A new, laminar flow type photochemical vapor deposition method has been applied to prepare a-Si:H films. The main feature of this method is introduction of Ar gas as a flow down gas through the lower part of the quartz window into the reaction chamber to keep the window highly transparent. The high deposition rate (150 A/min) of the a-Si:H film has been stably maintained by optimizing the flow rate for each gas into the chamber. Utilizing this new method, we have been able to realize high quality films with low impurity content, high resistivity (>10 11 Ω cm), low dangling bond density (5×10 15 cm -3 ), etc