Youngsu Chung

Hole-injecting conducting-polymer compositions for highly efficient and stable organic light-emitting diodes

This letter introduces conducting polymer compositions which can be used for hole-injection layer in organic light-emitting diodes. The compositions are composed of poly (3,4-ethylenedioxythiophene) (PEDOT), polystyrene sulfonic acid (PSS) and a perfluorinated ionomer. The films based on these compositions showed much higher workfunction (∼5.3–5.7eV) than conventional PEDOT/PSS (∼5.0–5.2eV). When we fabricated blue polymer light-emitting diodes by using these compositions as a hole-injection layer, the luminescent efficiency was improved and the device lifetime was also enhanced relative to the device using the commercially available PEDOT/PSS. These compositions including perfluorinated ionomers can be one of the promising candidates for a hole-injection layer in organic light-emitting devices.

Direct observation of interstitial molecular N2 in Si oxynitrides

High-resolution near edge x-ray absorption spectroscopy and x-ray photoelectron spectroscopy were used to characterize ultrathin plasma-nitrided silicon oxides. The direct observation of interstitial molecular N2 was made by vibrationally resolved N K-edge absorption spectroscopy. The N2 molecules were trapped during the plasma nitridation at the near surface and could be eliminated by annealing via molecular out-diffusion.

Alkyl thiols as a sulfur precursor for the preparation of monodisperse metal sulfide nanostructures

We demonstrate a new method for preparing metal sulfide nanocrystals using alkyl thiols as a sulfur precursor. Alkyl thiols have many advantages for practical synthesis because they are miscible with most organic solvents and very stable under an air atmosphere. CdS nanocrystals were made with CdO and thiols with different alkyl chains such as n-octanethiol and octadecanethiol. They exhibited uniform size, highly crystalline structure and a sharp photoluminescence spectrum. Also, CdSe/CdS core/shell nanocrystals can be prepared by single injection of a mixture consisting of alkyl thiol and Se in trioctylphosphine to a Cd precursor. A reaction scheme is proposed as alkyl thiols react with the metal precursor to form stable metal thiolate intermediates during the initial period of reaction, and the thiolate decomposes slowly to form homogeneous nuclei.

Improvement of NBTI and electrical characteristics by ozone pre-treatment and PBTI issues in HfAlO(N) high-k gate dielectrics

For the first time, we have investigated the effect of ozone (O/sub 3/) pre-treatment on the bias temperature instability (BTI) characteristics of high-k gate dielectrics. We found that O/sub 3/ pre-treatment improved NBTI and the electrical characteristics of HfAlON gate dielectric. We suggest that O/sub 3/ pre-treatment effectively suppresses the incorporation of the impurities (such as nitrogen (N), hydrogen (H) and water related species), resulting in the improvement of NBTI characteristics (-2.32 V operating voltage for 10 years lifetime). For the PBTI characteristics, the high-k gate dielectric with poly-Si gate electrode was severely degraded. We suggest that dopants (such as arsenic (As) and phosphorus (P)) in the gate electrode of nMOSFETs diffuse into the gate dielectrics, causing the severe degradation of PBTI characteristics (/spl sim/1.1 V operating voltage for 10 years lifetime). We believe that the optimization in the high-k gate stack can improve the PBTI characteristics by suppressing the dopants incorporation.

X-ray absorption and photoelectron spectroscopic study of plasma-nitrided SiO2 film

Plasma-nitrided SiO2 thin film has been analyzed by synchrotron-radiation-based x-ray absorption and photoelectron spectroscopies (XAS and XPS). High-resolution N 1s XAS and N 1s, O 1s, and Si 2p XPS spectral changes were obtained for different annealing temperatures. N 1s XPS and XAS spectra show that at room temperature, besides the main species of N[Si(O−)3−x]3, there exist free moleculelike N2 and HN[Si(O−)3]2, H2NSi(O−)3, and N–Si2O species with surface contaminants. The spectral intensities of the N2 and the HN[Si(O−)3]2, H2NSi(O−)3, and N–Si2O species decrease as the annealing temperature increases, and finally the nitrogen exists dominantly in the form of N[Si(O)3]3 species above 820K, indicating out-diffusion of molecular N2 and structural reconstruction to form a stable structure upon annealing. The Si 2p and O 1s XPS spectra show that Si>4+ 2p peak and O 1s peak appear at 103.7 and 534.0eV, respectively, which are higher binding energies than those of thermally grown oxynitride films with lower...

Dual High-k Gate Dielectric Technology Using Selective AlOx Etch (SAE) Process with Nitrogen and Fluorine Incorporation

We propose a novel Vth, control method for HfSiON (or HfO2) with poly-Si and metal inserted poly-Si stacks (MIPS) gates. By using a selective AlOx etch (SAE) process, we successfully integrate dual high-k gate oxide scheme; HfSiO/poly-Si stack for nMOS and HfSiO/AlOx/poly-Si stack for pMOS. Therefore, symmetrical Vth values of 0.43V(nMOS)/-0.44V (pMOS) have been obtained in poly-Si gate. For MIPS gate, we perform the SAE process with impurity incorporation at the channel region, such as N 2 for nMOS and F for pMOS. Consequently, nMOS Vth of 0.35V and pMOS Vth of -0.45V are obtained without counter channel doping. Moreover, we find out that impurity incorporation at the channel also improves mobility and reliability characteristics. Finally, by using the SAE process with impurity incorporation, maximum operating voltages above 1.0V are obtained by an extrapolated 10 years lifetime

Characteristics of ALD HfSiO/sub x/ using new Si precursors for gate dielectric applications

We have successfully developed a process for ALD HfSiO/sub x/ that can provide excellent compositional control by using new Si precursors, Si/sub 2/Cl/sub 6/ (HCDS) and SiH[(CH/sub 3/)/sub 2/]/sub 3/ (tDMAS). In addition, comparisons of electrical properties of HfSiO/sub x/ using two Si precursors have been performed. CMOSFET with HfSiO/sub x/ using HCDS results in better reliability characteristics than tDMAS. Superior electron and hole mobility (100% and 90% of universal curve at 0.8MV/cm) are also achieved with HCDS. Consequently, HCDS has the potential to be used as a Si precursor for ALD HfSiO/sub x/.

HCI and BTI characteristics of ALD HfSiO(N) gate dielectrics as the compositions and the post treatment conditions

For the first time, we evaluate the HCI and BTI degradation of ALD HfSiO(N) gate dielectrics as the compositions and the post annealing conditions. The HCI and PBTI degradation are minimized at Hf to Si cycle ratio of 3 to 1 (Hf/(Hf+Si) = 0.75) and the post reoxidation annealing suppresses both degradations. It is believed that the HCI and PBTI degradation are related to the electron traps in the gate oxide. However, NBTI degradation is negligibly small compared to PBTI degradation. This indicates that the positive fixed charge generation or hole traps are not significant in ALD HfSiO(N) gate dielectrics.

Reliability Improvement of Passivated Power Line in Memory Devices

In the present study, several different types of amorphous passivation layers such as PECVD-SiN and PECVD-TEOS were tested to learn how effectively they protect underlying Al interconnection lines. According to the experimental results, a thick monolithic passivation layer composing of PECVD-SiN was found to be highly susceptible to stress-related migration because it did not have sufficient elasticity. Moreover, since silicon nitride also has a high dielectric-breakdown strength, it exhibits an increased impedance to electric current due to parasitic resistance that exists in the path between the two passivated metal lines. On the other hand, passivation thickening through the use of PECVD-TEOS as an initial layer was estimated to be a more effective way to improve device reliability because of its better step coverage and smaller dielectric constant. The FEM simulation explains why the thick multilayer compromising an alternating sequence of mechanically dissimilar layers is an effective way to suppress stress-induced passivation damage during thermal cycling without having a significant effect on the IC pattern.

Integration Friendly Dual Metal Gate Technology Using Dual Thickness Metal Inserted Poly-Si Stacks (DT-MIPS)

We have successfully developed integration friendly dual metal gate process utilizing a dual thickness metal inserted poly-Si stacks (DT-MIPS) structure; poly-Si/TaN/HfON stacks for nMOS and poly-Si/capping metal layer(c-ML)/AlOx/TaN/HfON stacks for pMOS. First, in spite of different metal thickness on n/pMOS, a high-selectivity gate etch process can completely remove metal and HfON layers from the S/D active regions with negligible Si recess in both n/pMOS. Consequently, in both short and long channel devices, n/pMOS Vth values of ~plusmn0.35 V are obtained without counter channel doping. Moreover, excellent drive currents (620/250 muA/um for n/pMOS at Ioff=20 pA/um and Vdd=1.2 V) are obtained without using any mobility enhancement technique. Finally, we confirm that the estimated operation voltages for 10 years lifetime for both nMOS PBTI and pMOS NBTI are well beyond the 1.2 V.