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Dive into the research topics where Yuri Mirgorodski is active.

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Featured researches published by Yuri Mirgorodski.


international reliability physics symposium | 2005

Anomalous NMOSFET hot carrier degradation due to trapped positive charge in a DGO CMOS process

Douglas Brisbin; Yuri Mirgorodski; Prasad Chaparala

It has been reported that MOSFET hot carrier (HC) performance is degraded by back-end-of-line (BEOL) processing steps such as interlayer dielectric film deposition, passivation, and H/sub 2/ annealing. These effects are associated with the incorporation of additional hydrogen at the Si-SiO/sub 2/ interface states to passivate dangling bonds. This paper focuses on an unusual (anomalous) I/sub Dsat/ HC degradation behavior seen on a (DGO) NMOSFET device that was determined to be caused by a dielectric (SiON) contact etch stop process step. This paper presents a novel NMOSFET HC degradation behavior model based on HC injected positive trapped charge that is spatially separated from the normal HC trapped electron charge. This paper shows that this charge separation and positive charge injection creates a secondary impact ionization site that is within the device channel and results in anomalous and accelerated I/sub Dsat/ HC degradation behavior.


international integrated reliability workshop | 2004

Anomalous NMOSFET hot carrier degradation due to hole injection in a DGO CMOS process

Douglas Brisbin; Yuri Mirgorodski; Prasad Chaparala

It has been reported that MOSFET hot carrier (HC) performance is degraded by back-end-of-line (BEOL) processing steps such as interlayer dielectric film deposition, passivation, and H/sub 2/ annealing. These effects are associated with the incorporation of additional hydrogen at the Si-SiO/sub 2/ interface states to passivate dangling bonds. This paper focuses on an unusual (anomalous) I/sub Dsat/ HC degradation behavior seen on a dual gate oxide (DGO) NMOSFET device that was determined to be caused by a dielectric (SiON) contact etch stop process step. This paper presents a novel NMOSFET HC degradation behavior model based on HC injected positive trapped charge that is spatially separated from the normal HC trapped electron charge. This paper shows that this charge separation and positive charge injection creates a secondary impact ionization site that is within the device channel and results in anomalous and accelerated I/sub Dsat/ HC degradation behavior.


Archive | 1985

Nonvolatile memory cell

Pavel Poplevine; Yuri Mirgorodski; Andrew J. Franklin; Hengyang Lin


Archive | 2004

Laser powered clock circuit with a substantially reduced clock skew

Peter J. Hopper; Philipp Lindorfer; Vladislav Vashchenko; Yuri Mirgorodski


Archive | 2001

Split gate memory cell with a floating gate in the corner of a trench

Yuri Mirgorodski


Archive | 2004

Programming method for nonvolatile memory cell

Pavel Poplevine; Yuri Mirgorodski; Andrew J. Franklin; Peter J. Hopper


Archive | 2004

Non-volatile memory cell with gated diode and MOS transistor and method for using such cell

Peter J. Hopper; Yuri Mirgorodski; Vladislav Vashchenko


Archive | 2001

Split-gate flash memory cell with a tip in the middle of the floating gate

Peter J. Hopper; Yuri Mirgorodski


Archive | 2003

Method of PMOS stacked-gate memory cell programming enhancement utilizing stair-like pulses of control gate voltage

Yuri Mirgorodski; Vladislav Vashchenko; Peter J. Hopper


Archive | 2004

Snapback clamp having low triggering voltage for ESD protection

Vladislav Vashchenko; Peter J. Hopper; Yuri Mirgorodski

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