Yutaka Tsukada

Materials and mechanics issues in flip-chip organic packaging

The strength of flip chip organic packaging technology rests upon the knowledge and manufacturing base of C4 solder bump chip interconnection, and printed circuit technology infrastructure. The key innovation was the underfill encapsulation between the chip and the laminate which overcame the road-block of low cycle fatigue of C4 solder bump due to large CTE difference between silicon and laminate. The advent of SLC (surface laminar circuit) innovation extends the flip chip technology to higher solder bump density and larger chip I/O expected for future generations of semiconductors. The flip chip packages contain new materials, interfaces, and new processes which in turn govern the mechanical integrity of the packaging module and module card assembly. The increasing pervasiveness of electronic packages requires meeting new sets of environments. It is important to have a good understanding of materials, interface, metrology and mechanics issues related to organic packages, and how to apply this understanding in the modelling of design, process and reliability of flip chip. This paper will deliver an overview of some of the key technical challenges associated with materials and mechanics in FCA (flip-chip attach) assembly on organic carriers.

Surface laminar circuit packaging

Discusses the SLC (surface laminar circuit), a component carrier technology which satisfies various requirements for packaging of small computers through its surface laminar structure, which is similar to semiconductor wiring. By utilizing photo via holes instead of plated through holes for signal line connection, SLC has a high wiring density which allows it to carry bare chips directly attached on the SLC by flip chip attach. This packaging technology has an extended reliability compared with conventional flip chip bonding and a wide range of application in small computers.<<ETX>>

A novel chip replacement method for encapsulated flip chip bonding

In FCA (Flip Chip Attach) technology, the encapsulation for the flip chip joints relieves the stress which is supposed to be concentrated on these joints by the thermal cycling of the system. It allows us to use low cost-material such as epoxy for a carrier of flip chip bonding though it has significantly higher CTE than ceramic. However, the chip replacement after encapsulation becomes difficult when it is found to be defective. To resolve this problem, we have developed a simple replacement technique. In this technique, the encapsulated chip for replacement is ground off with about a half height of encapsulation. After providing carrier bumps with solder injection, a new chip is placed and the joining cycle is followed with the same manner of initial chip join. The reliability of the joints showed the same level as the initially built joints. This technique can be applied for the replacement of any kind of encapsulated flip chip bonding.<<ETX>>

Features of new laser micro-via organic substrate for semiconductor package

An introduced new substrate technology for semiconductor packaging by flip chip bonding has featured with following design deliverables. The conductor line width is 25 μm and the space between the lines is 25 μm minimum at an escape point between flip chip pads. The thickness of dielectric layer is adjusted to obtain characteristic impedance with 50 Ω. A film resin for dielectric is applied to a base core sequentially with conductor plane alternately and laser-drilled micro-via hole is formed in the resin to connect conductor planes. UV-laser drill is employed to provide micro-via hole with 48 μm as drilled. The conductor layers are formed with copper pulse-pattern plating after electroless seed layer plating. The substrate passed JEDEC level-3 stress test and 10 GHz clock frequency possibility was demonstrated.

High-bandwidth density optical I/O for high-speed logic chip on waveguide-integrated organic carrier

We demonstrate a high-bandwidth density optical I/O on a waveguide-integrated organic carrier. Each transmitter channel operates at a data rate up to 20 Gb/s for an aggregate value of 240 Gb/s. High-speed and inter-channel crosstalk characterization show that the optical multi-chip module realizes over 10 times higher bandwidth density than conventional optical fiber modules by chip-level packaging and waveguide core pitch reduction, therefore the module supports a nearly 2 Tb/s bandwidth.