Zeng Chuanbin

Estimation of pulsed laser-induced single event transient in a partially depleted silicon-on-insulator 0.18-μm MOSFET

In this paper, we investigate the single event transient (SET) occurring in partially depleted silicon-on-insulator (PDSOI) metal—oxide—semiconductor (MOS) devices irradiated by pulsed laser beams. Transient signal characteristics of a 0.18-μm single MOS device, such as SET pulse width, pulse maximum, and collected charge, are measured and analyzed at wafer level. We analyze in detail the influences of supply voltage and pulse energy on the SET characteristics of the device under test (DUT). The dependences of SET characteristics on drain-induced barrier lowering (DIBL) and the parasitic bipolar junction transistor (PBJT) are also discussed. These results provide a guide for radiation-hardened deep sub-micrometer PDSOI technology for space electronics applications.

ESD protection design for the gate oxide of an RF-LDMOS

This paper presents the investigation of integrated electro-static discharge (ESD) protection design for the gate oxide of an RF-LDMOS (radio frequency lateral double diffusion MOS). Through a comprehensive discussion of experimental and simulated results, a cascoded NMOS is presented as appropriate integrated gate oxide ESD protection with a high holding voltage and a flexible ESD design window.

Holding-voltage drift of a silicon-controlled rectifier with different film thicknesses in silicon-on-insulator technology

This paper presents a new phenomenon, where the holding-voltage of a silicon-controlled rectifier acts as an electrostatic-discharge protection drift in diverse film thicknesses in silicon-on-insulator (SOI) technology. The phenomenon was demonstrated through fabricated chips in 0.18 μm SOI technology. The drift of the holding voltage was then simulated, and its mechanism is discussed comprehensively through ISE TCAD simulations.