Ali Saeidi

Condition for the negative capacitance effect in metal-ferroelectric-insulator-semiconductor devices

In this paper, we report a detailed study of the negative capacitance field effect transistor (NCFET). We present the condition for the stabilization of the negative capacitance to achieve the voltage amplification across the active layer. The theory is based on Landaus theory of ferroelectrics combined with the surface potential model in all regimes of operation. We demonstrate the validity of the presented theory on experimental NCFETs using a gate stack made of P(VDF-TrFE) and SiO2. The proposed analytical modeling shows good agreement with experimental data.

Effect of hysteretic and non-hysteretic negative capacitance on tunnel FETs DC performance

This work experimentally demonstrates that the negative capacitance effect can be used to significantly improve the key figures of merit of tunnel field effect transistor (FET) switches. In the proposed approach, a matching condition is fulfilled between a trained-polycrystalline PZT capacitor and the tunnel FET (TFET) gate capacitance fabricated on a strained silicon-nanowire technology. We report a non-hysteretic switch configuration by combining a homojunction TFET and a negative capacitance effect booster, suitable for logic applications, for which the on-current is increased by a factor of 100, the transconductance by 2 orders of magnitude, and the low swing region is extended. The operation of a hysteretic negative capacitance TFET, when the matching condition for the negative capacitance is fulfilled only in a limited region of operation, is also reported and discussed. In this late case, a limited improvement in the device performance is observed. Overall, the paper demonstrates the main beneficial effects of negative capacitance on TFETs are the overdrive and transconductance amplification, which exactly address the most limiting performances of current TFETs.

Negative capacitance field effect transistors; capacitance matching and non-hysteretic operation

This work experimentally demonstrates negative capacitance MOSFETs in hysteretic and non-hysteretic modes of operation. A PZT capacitor is externally connected to the gate of commercial nMOSFETs fabricated in 28nm CMOS technology to explore the negative capacitance effect. In hysteretic devices, subthreshold slope as steep as 10mV/dec is achieved in the region where the ferroelectric represents an S-shape polarization. In addition, a matching condition is achieved between a PZT capacitor and the gate capacitance of MOSFETs fabricated on SOI substrates. For the first time, we achieve a non-hysteretic switch configuration in our fabricated MOSFETs, suitable for analog and digital applications, for which a reduction in the subthreshold swing is obtained down to 20mV/dec.

Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study

This letter reports for the first time a full experimental study of performance boosting of tunnel FETs (TFETs) and MOSFETs by negative capacitance (NC) effect. We discuss the importance of capacitance matching between a ferroelectric NC and a device capacitance to achieve hysteretic and non-hysteretic characteristics. PZT ferroelectric capacitors are connected to the gate of three terminals TFETs and MOSFETs and partial or full matching NC conditions for amplification and stability are obtained. First, we demonstrate the characteristics of hysteretic and non-hysteretic NC-TFETs. The main performance boosting is obtained for the non-hysteretic NC-TFET, where the ON-current is increased by a factor of 500 times, transconductance is enhanced by three orders of magnitude, and the low slope region is extended. The boosting of performance is moderate in the hysteretic NC-TFET. Second, we investigate the impact of the same NC booster on MOSFETs. Subthreshold swing as steep as 4 mV/decade with a 1.5-V hysteresis is obtained on a commercial device fabricated in 28-nm CMOS technology. Moreover, we demonstrate a non-hysteretic NC-MOSFET with a full matching of capacitances and a reduced subthreshold swing down to 20 mV/decade.