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Dive into the research topics where Amlan Chakrabarti is active.

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Featured researches published by Amlan Chakrabarti.


Ain Shams Engineering Journal | 2016

A review on application of data mining techniques to combat natural disasters

Saptarsi Goswami; Sanjay Chakraborty; Sanhita Ghosh; Amlan Chakrabarti; Basabi Chakraborty

Abstract Thousands of human lives are lost every year around the globe, apart from significant damage on property, animal life, etc., due to natural disasters (e.g., earthquake, flood, tsunami, hurricane and other storms, landslides, cloudburst, heat wave, forest fire). In this paper, we focus on reviewing the application of data mining and analytical techniques designed so far for (i) prediction, (ii) detection, and (iii) development of appropriate disaster management strategy based on the collected data from disasters. A detailed description of availability of data from geological observatories (seismological, hydrological), satellites, remote sensing and newer sources like social networking sites as twitter is presented. An extensive and in-depth literature study on current techniques for disaster prediction, detection and management has been done and the results are summarized according to various types of disasters. Finally a framework for building a disaster management database for India hosted on open source Big Data platform like Hadoop in a phased manner has been proposed. The study has special focus on India which ranks among top five counties in terms of absolute number of the loss of human life.


IEEE Transactions on Very Large Scale Integration Systems | 2013

Optimized Quantum Gate Library for Various Physical Machine Descriptions

Chia-Chun Lin; Amlan Chakrabarti; Niraj K. Jha

Quantum logic circuits consist of a cascade of quantum gates. These gates are realized using primitive quantum operations that are supported by a quantum physical machine description (PMD). Since different quantum systems are associated with different Hamiltonians, a specific quantum operation may be more easily realizable in one quantum system than another. Thus, different quantum systems have different PMDs. Also, the quantum cost for implementing a quantum operation may differ from one PMD to another. Thus, a quantum logic circuit needs to be realized with and optimized for only the set of primitive quantum operations supported by the given PMD. Quantum logic design that can be targeted at multiple PMDs has not been attempted before, to the best of our knowledge. In this paper, we target quantum logic design with respect to the set of primitive quantum operations that are supported by six different PMDs: quantum dot, superconducting, ion trap, neutral atom, and two photonics systems. Our aim is to build a quantum gate library that targets these PMDs. This is akin to a cell library in traditional logic design that enables logic gates to be mapped to cells realizable in an underlying technology. To make our quantum gate library efficient in terms of the number of primitive quantum operations involved and the associated delay, we explore one- and two-qubit quantum identity rules that can help remove redundancies in the quantum gate implementation. We show that, using these identities, each gate in the library can be efficiently mapped to just the set of primitive operations supported by each of the six PMDs. Each mapping results in a different circuit structure and quantum cost, which is measured in terms of the number of primitive quantum operations and the number of execution cycles required. Thus, such a library provides the foundation for quantum logic synthesis, just like a cell library provides the foundation for technology-dependent logic synthesis (i.e., technology mapping) in traditional synthesis.


IEEE Transactions on Very Large Scale Integration Systems | 2014

FTQLS: Fault-Tolerant Quantum Logic Synthesis

Chia-Chun Lin; Amlan Chakrabarti; Niraj K. Jha

Quantum computation can solve certain problems much faster than classical computation. However, quantum computations are more susceptible to errors than conventional digital computations. Thus, a fault-tolerant (FT) quantum circuit design is required for a practical implementation. Quantum circuits consist of a cascade of quantum gates. These gates are themselves realized using primitive quantum operations that are supported by the quantum physical machine description (PMD). As different quantum systems are associated with different Hamiltonians, they have different PMDs. In addition, the quantum cost for implementing a quantum operation may differ from one PMD to another. Thus, a quantum logic circuit needs to be realized with and optimized for the set of primitive quantum operations supported by the given PMD. In this paper, an FT quantum logic synthesis (FTQLS) methodology and tool is described for six different PMDs. A methodology, such as this, which can be targeted at multiple PMDs, has not been attempted before, to the best of our knowledge. The input to FTQLS is an unoptimized quantum circuit realized using a set of commonly used gates and its output is an optimized FT quantum circuit that only comprises of primitive quantum operations supported by the given PMD. FTQLS does technology mapping for different PMDs and then converts non-FT circuits to FT circuits. For technology mapping, it utilizes an optimized quantum gate library targeted at various PMDs that decomposes gates into primitive operations. Efficient conversion to FT circuits is done by integrating two quantum compilers and an FT cache table into FTQLS. For improving the synthesis results, an FT set of gates that is directly supported by each PMD is proposed. Quantum circuit optimization is done by utilizing quantum identity rules. The performance of FTQLS is evaluated using two cost metrics: number of primitive operations (#ops) and execution cycles on the critical path (#cycles). Experiment results show that the decrease in #ops varies between 58.1% and 87.0% and in #cycles between 42.8% and 76.4%, on an average, depending on the PMD.


international symposium on multiple-valued logic | 2011

Synthesis Techniques for Ternary Quantum Logic

Sudhindu Bikash Mandal; Amlan Chakrabarti; Susmita Sur-Kolay

Synthesis of ternary quantum circuits involves basic ternary gates and logic operations in the ternary quantum domain. Works that define ternary algebra and their applications for ternary quantum logic realization, are very few. In this paper, we express a ternary logic function in terms of projection operations including a new one. We demonstrate how to realize a few new multi-qutrit ternary gates in terms of generalized ternary gates and projection operations. We then employ our synthesis method to design ternary adder circuits which have better cost than that obtained by earlier method.


IEEE Embedded Systems Letters | 2015

Scheduling Dynamic Hard Real-Time Task Sets on Fully and Partially Reconfigurable Platforms

Sangeet Saha; Arnab Sarkar; Amlan Chakrabarti

Reconfigurable systems are increasingly being employed in a large class of todays heterogeneous real-time embedded systems which often demand satisfaction of stringent timeliness constraints. However, executing a set of hard real-time applications on reconfigurable systems such that all timing constraints are satisfied while also allowing efficient resource utilization requires effective scheduling, mapping and admission control strategies. This letter presents methodologies for scheduling periodic hard real-time dynamic task sets on fully and partially reconfigurable field-programmable gate arrays (FPGAs). The floor of the FPGA is assumed to be statically equipartitioned into a set of homogeneous tiles (each of which act as individual processing elements or PEs) such that any arbitrary task of the given task set may be feasibly mapped into the area of a given tile. Experimental results reveal that the proposed algorithms are able to achieve high resource utilization with low task rejection rates over a variety of simulation scenarios.


international conference on advanced computing | 2007

Rules for Synthesizing Quantum Boolean Circuits Using Minimized Nearest-Neighbour Templates

Amlan Chakrabarti; Susmita Sur-Kolay

Quantum Boolean circuit (QBC) synthesis issues are becoming a key area of research in the domain of quantum computing. While Minterm gate based synthesis and Reed-Muller based canonical decomposition techniques are adopted commonly, nearest neighbor synthesis technique for QBC utilizes the quantum logic gates involving only the adjacent target and control qbits for a given quantum network. Instead of Quantum Boolean circuit synthesis using (SNOT gate, we have chosen the template-based technique for synthesis of QBC. This work defines new minimization rules using nearest neighbor templates, which results in reduced number of quantum gates and circuit levels. The need of proper relative placements of the quantum gates in order to achieve the minimum gate configuration has also been discussed.


reversible computation | 2015

Synthesis of Quantum Circuits for Dedicated Physical Machine Descriptions

Philipp Niemann; Saikat Basu; Amlan Chakrabarti; Niraj K. Jha; Robert Wille

Quantum computing has been attracting increasing attention in recent years because of the rapid advancements that have been made in quantum algorithms and quantum system design. Quantum algorithms are implemented with the help of quantum circuits. These circuits are inherently reversible in nature and often contain a sizeable Boolean part that needs to be synthesized. Consequently, a large body of research has focused on the synthesis of corresponding reversible circuits and their mapping to the quantum operations supported by the quantum system. However, reversible circuit synthesis has usually not been performed with any particular target technology in mind, but with respect to an abstract cost metric. When targeting actual physical implementations of the circuits, the adequateness of such an approach is unclear. In this paper, we explicitly target synthesis of quantum circuits at selected quantum technologies described through their Physical Machine Descriptions (PMDs). We extend the state-of-the-art synthesis flow in order to realize quantum circuits based on just the primitive quantum operations supported by the respective PMDs. Using this extended flow, we evaluate whether the established reversible circuit synthesis methods and metrics are still applicable and adequate for PMD-specific implementations.


ACM Journal on Emerging Technologies in Computing Systems | 2014

QLib: Quantum module library

Chia-Chun Lin; Amlan Chakrabarti; Niraj K. Jha

Quantum algorithms are known for their ability to solve some problems much faster than classical algorithms. They are executed on quantum circuits, which consist of a cascade of quantum gates. However, synthesis of quantum circuits is not straightforward because of the complexity of quantum algorithms. Generally, quantum algorithms contain two parts: classical and quantum. Thus, synthesizing circuits for the two parts separately reduces overall synthesis complexity. In addition, many quantum algorithms use similar subroutines that can be implemented with similar circuit modules. Because of their frequent use, it is important to use automated scripts to generate such modules efficiently. These modules can then be subjected to further synthesis optimizations. This article proposes QLib, a quantum module library, which contains scripts to generate quantum modules of different sizes and specifications for well-known quantum algorithms. Thus, QLib can also serve as a suite of benchmarks for quantum logic and physical synthesis.


vlsi design and test | 2012

A synthesis method for quaternary quantum logic circuits

Sudhindu Bikash Mandal; Amlan Chakrabarti; Susmita Sur-Kolay

Synthesis of quaternary quantum circuits involves basic quaternary gates and logic operations in the quaternary quantum domain. In this paper, we propose new projection operations and quaternary logic gates for synthesizing quaternary logic functions. We also demonstrate the realization of the proposed gates using basic quantum quaternary operations. We then employ our synthesis method to design of quaternary adder and some benchmark circuits. Our results in terms of circuit cost, are better than the existing works.


Expert Systems With Applications | 2017

A feature cluster taxonomy based feature selection technique

Saptarsi Goswami; Amit Kumar Das; Amlan Chakrabarti; Basabi Chakraborty

FCTFS works in both autonomous and user guided mode.The defined taxonomy helps in arriving at optimal number of good quality clusters.Feature elimination due to irrelevance and redundancy is clearly isolated.It is faster than traditional search based methods.Yields superior results compared to some state of the art methods over 24 data sets. Feature subset selection is basically an optimization problem for choosing the most important features from various alternatives in order to facilitate classification or mining problems. Though lots of algorithms have been developed so far, none is considered to be the best for all situations and researchers are still trying to come up with better solutions. In this work, a flexible and user-guided feature subset selection algorithm, named as FCTFS (Feature Cluster Taxonomy based Feature Selection) has been proposed for selecting suitable feature subset from a large feature set. The proposed algorithm falls under the genre of clustering based feature selection techniques in which features are initially clustered according to their intrinsic characteristics following the filter approach. In the second step the most suitable feature is selected from each cluster to form the final subset following a wrapper approach. The two stage hybrid process lowers the computational cost of subset selection, especially for large feature data sets. One of the main novelty of the proposed approach lies in the process of determining optimal number of feature clusters. Unlike currently available methods, which mostly employ a trial and error approach, the proposed method characterises and quantifies the feature clusters according to the quality of the features inside the clusters and defines a taxonomy of the feature clusters. The selection of individual features from a feature cluster can be done judiciously considering both the relevancy and redundancy according to users intention and requirement. The algorithm has been verified by simulation experiments with different bench mark data set containing features ranging from 10 to more than 800 and compared with other currently used feature selection algorithms. The simulation results prove the superiority of our proposal in terms of model performance, flexibility of use in practical problems and extendibility to large feature sets. Though the current proposal is verified in the domain of unsupervised classification, it can be easily used in case of supervised classification.

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Rourab Paul

Indian Institutes of Technology

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Sudhindu Bikash Mandal

Information Technology University

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Susmita Sur-Kolay

Indian Statistical Institute

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Suman Sau

University of Calcutta

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