Andre Touboul

Backside laser testing of ICs for SET sensitivity evaluation

A new experimental approach combining backside laser testing and analog mapping is presented. A new technique for integrated circuits (ICs) backside preparation by laser ablation is evaluated. The methodology is applied to the study of single-event transient (SET) sensitivity on a linear IC.

Kink effect in HEMT structures: A trap-related semi-quantitative model and an empirical approach for spice simulation

Abstract The mechanism of kink effect in AlGaAs/GaAs high-electron-mobility transistors (conventional, normally-on) is reported. An analytical model, in good agreement with experimental results (behaviour of the kink voltage with temperature and gate voltage) shows that this effect is related to impact ionization phenomenon. Accurate prediction of the I − V characteristics including the kink effect can be carried out, extending the d.c.-equations of the SPICE GaAs-FET model. Three parameters are used in the kink region for the drain current. All of them are extracted from experimentally measured I − V characteristics and preserve physical meaning.

Characterization and analysis of trap-related effects in AlGaN-GaN HEMTs

Abstract Traps are characterized in AlGaN–GaN HEMTs by means of DLTS techniques and the associated charge/discharge behavior is interpreted with the aid of numerical device simulations. Under specific bias conditions, buffer traps can produce “false” surface-trap signals, i.e. the same type of current-mode DLTS (I-DLTS) or ICTS signals that are generally attributed to surface traps. Clarifying this aspect is important for both reliability testing and device optimization, as it can lead to erroneous identification of the degradation mechanism, thus resulting in wrong correction actions on the technological process.

Laser cross section measurement for the evaluation of single-event effects in integrated circuits

Abstract The cross section of ICs extracted from particles accelerator testing is extended to the pulsed laser testing. The extraction methodology attached to this new parameter is presented. It provides a new tool for integrated circuits reliability quantification, illustrated in the case of SEU sensitivity evaluation of a single SRAM cell.

AlGaN/GaN HEMT Reliability Assessment by means of Low Frequency Noise Measurements

Although impressive results have been published for GaN-based transistors in a large frequency range reliability demonstration is becoming an important subject of concern. In this article the conditions of a long term DC life test is presented and a detailed description of pre- and post-test characterization by means of Low Frequency Noise measurements (LFN) is discussed. The transistor parameters (IDSS, Ron, Vp) and the drain noise spectra presented an evolution strictly related to the biasing point during the stress. This demonstrates that LFN measurement is a useful tool to investigate degradation in GaN HEMTs.

Single-event sensitivity of a single SRAM cell

A test vehicle has been specially realized to demonstrate that different physical mechanisms are responsible for single-event upset phenomena within an elementary memory cell, depending on the impact location. Validation is performed using pulsed laser equipment.

Implementation of total dose effects in the bipolar junction transistor Gummel-Poon model

The effects of total dose on the SPICE model of bipolar junction transistors are investigated. The limitations of the standard Gummel-Poon model for simulating the radiation-induced excess base current are analyzed, and a new model based on an empirical approach is proposed. Four new SPICE rad-parameters are presented, and investigated for different dose rates. The relevant parameters are extracted using a new algorithmic procedure, combining a genetic approach and the standard optimization technique which minimizes the RMS error between measured and simulated excess base current. It is shown that the excess base current is accurately described by the same formula whatever the device type is. An empirical fitting of the rad-parameters as a function of total dose is proposed to use in hardening electronic circuits for space-like environments.

Numerical modelling of mechanisms involved in latchup triggering by a laser beam

The use of a laser beam is a well-known technique to trigger latchup parasitic structures in ICs. Numerical analyses of this phenomenon are brought into play to study its sensitivity when a continuous wave laser as well as pulsed lasers are used. The impact location is also studied to demonstrate that different mechanisms are involved in the triggering phase of latchup. The structure is also more sensitive to the blue light when it is directed over the well-substrate junction while it is more sensitive to infrared light elsewhere. When using a CW laser, the curves giving the power supply current versus the photo-induced current provide direct information on the parameters of the parasitic structure.

Application of various optical techniques for ESD defect localization

Various optical defect localization techniques are applied on the same integrated circuits (IC). These circuits were previously stressed by Electro Static Discharges (ESD) to create defects. The results obtained by each technique were analyzed to determine the nature of the defects. The different data are compared to assess their sensitivity and to evaluate the contribution of each technique in a failure analysis flow.

Induced damages on CMOS and bipolar integrated structures under focused ion beam irradiation

Focused ion beam used for failure analysis or repairing of ASICs degrades device performances by charging up the surface circuit. The influence of focused ion beam on device electrical performances has been studied to understand the behavior of basic test integrated circuits. We have performed measurements on test structures : MOS capacitors and transistors and bipolar transistors. Oxide trap filling and leakage current through the structures induce different failure mechanisms such as : threshold voltage shift in MOS transistors, deep depletion state in MOS capacitors and current gain decrease in bipolar transistors. A characterization of these effects and a first interpretation are proposed.