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Dive into the research topics where B. Buchanan is active.

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Featured researches published by B. Buchanan.


IEEE Photonics Technology Letters | 1995

8 x 8 array of thin-film photodetectors vertically electrically interconnected to silicon circuitry

S. Fike; B. Buchanan; Nan Marie Jokerst; Martin A. Brooke; Tonia G. Morris; Stephen P. DeWeerth

This paper reports the integration of an 8/spl times/8 array of thin-film GaAs-AlGaAs photodetectors onto a silicon-oscillator array circuit for massively parallel-image processing applications. Each detector was electrically connected to the oscillator below it using vertical electrical interconnections. Both sides of the thin-film devices were metallized for electrical contact, which minimized the interconnection density on the silicon circuit, thereby maximizing the available signal processing area. The yield of this integrated array and associated circuit was 100%, with the majority of pixels demonstrating a dynamic range of 50 dB.<<ETX>>


lasers and electro optics society meeting | 1996

Thin-film multimaterial optoelectronic integrated circuits

Nan Marie Jokerst; Martin A. Brooke; O. Vendier; S.T. Wilkinson; S. Fike; Myunghee Lee; Elizabeth J. Twyford; J. Cross; B. Buchanan; Scott Wills

The multimaterial integration of thin-film optoelectronic devices with host substrates ranging from silicon circuits to glass waveguides to polymer micromachines offers to the system designer the freedom to choose the optimal materials for each component to achieve performance and cost objectives. Thin-film compound semiconductor optoelectronic devices are comparable to, and, in some cases, better than, their on-wafer counterparts. Thin-film detectors have been integrated with receiver circuits and movable micromachines, thin-film emitters with drive circuitry, and both have been used to demonstrate three-dimensionally interconnected systems. Vertical electrical integration of detector arrays on top of circuits is examined for massively parallel processing of images. Vertical optical interconnections of stacked silicon circuits (which are transparent to the wavelength of light used) are explored, and are used to develop a massively parallel processing architecture based upon low memory, high throughput, and high input/output.


Journal of Lightwave Technology | 1995

A three-dimensional high-throughput architecture using through-wafer optical interconnect

D.S. Wills; W.S. Lacy; C. Camperi-Ginestet; B. Buchanan; H.H. Cat; S.T. Wilkinson; Myunghee Lee; Nan Marie Jokerst; Martin A. Brooke

This paper presents a three-dimensional, highly parallel, optically interconnected system to process high-throughput stream data such as images. The vertical optical interconnections are realized using. Integrated optoelectronic devices operating at wavelengths to which silicon is transparent. These through-wafer optical signals are used to vertically optically interconnect stacked silicon circuits. The thin film optoelectronic devices are bonded directly to the stacked layers of silicon circuitry to realize self-contained vertical optical interconnections. Each integrated circuit layer contains analog interface circuitry, namely, detector amplifier and emitter driver circuitry, and digital circuitry for the network and/or processor, all of which are fabricated using a standard silicon integrated circuit foundry. These silicon circuits are post processed to integrate the thin film optoelectronics using standard, low cost, high yield microfabrication techniques. The three-dimensionally integrated architectures described herein are a network and a processor. The network has been designed to meet off-chip I/O using a new offset cube topology coupled with naming and renting schemes. The performance of this network is comparable to that of a three-dimensional mesh. The processing architecture has been defined to minimize overhead for basic parallel operations. The system goal for this research is to develop an integrated processing node for high-throughput, low-memory applications. >


IEEE Photonics Technology Letters | 1996

A single-fiber bidirectional optical link using colocated emitters and detectors

J. Cross; Abelardo Lopez-Lagunas; B. Buchanan; Lawrence Carastro; Shih-Cheng Wang; Nan Marie Jokerst; Scott Wills; Martin A. Brooke; Mary Ann Ingram

This letter reports the bonding of a small, thin-film GaAs-based emitter onto a larger silicon detector to realize spatial colocation of the emitter and detector. These colocated devices enable single fiber bidirectional communication between the two analog/digital silicon circuits that contain the emitter/detector pairs. Bidirectional communication between two of these circuits is demonstrated with a single plastic optical fiber.


IEEE Photonics Technology Letters | 1995

Communication through stacked silicon circuitry using integrated thin film InP-based emitters and detectors

Nan Marie Jokerst; C. Camperi-Ginestet; B. Buchanan; S.T. Wilkinson; Martin A. Brooke

To demonstrate optical communication through stacked silicon circuitry, thin film InGaAsP-based emitters and photodetectors have been bonded directly onto silicon circuitry. These optoelectronic devices operate at a wavelength to which silicon is transparent. The thin film emitters and detectors were integrated onto a MOSIS foundry silicon CMOS integrated circuit which contained driver and amplifier circuits. Bidirectional vertical optical communication between two layers of circuitry was demonstrated by stacking the layers, exciting the emitter driver circuit on one layer with an electrical signal, and measuring the output electrical signal from the detector amplifier located on the other circuit in the vertical stack.<<ETX>>


First International Workshop on Massively Parallel Processing Using Optical Interconnections | 1994

A fine-grain, high-throughput architecture using through-wafer optical interconnect

W.S. Lacy; C. Camperi-Ginestet; B. Buchanan; D.S. Wills; Nan Marie Jokerst; Martin A. Brooke

The author present a highly parallel, three-dimensionally interconnected system to process high-throughput stream data such as images. Optical interconnect at wavelengths to which silicon is transparent is used to create the 3D system. Thin film InP/InGaAsP-based emitters and detectors operating at 1.3 microns are bonded to the silicon circuitry, and emit through the silicon wafer to create the vertical optical interconnect. Foundry-fabricated Si circuits are post processed using standard, low cost, high yield microfabrication techniques to integrate the thin film devices with the circuits. In order to meet off-chip I/O requirements, a high-bandwidth, three-dimensional optical network is also being designed. Using through-wafer optical interconnect, a new offset cube topology has been created, and naming and routing schemes have been developed. Its performance is comparable to that of a three-dimensional mesh. A processing architecture has also been defined that minimizes overhead for basic parallel operations. A complete processing node for high-throughput, low-memory applications can be implemented using a fraction of a chip.<<ETX>>


conference on advanced research in vlsi | 1995

Silicon VLSI processing architectures incorporating integrated optoelectronic devices

H. H. Cat; Myunghee Lee; B. Buchanan; D.S. Wills; Martin A. Brooke; Nan Marie Jokerst

Integrated optoelectronic interconnects offer a potentially lower cost, higher density alternative to wire-based technologies for I/O and inter-chip communication. This paper outlines two systems being designed at Georgia Tech which incorporate integrated thin film optoelectronic devices onto high throughput VLSI digital processors. The first system places an array of thin film detectors on top of SIMD processing elements allowing direct area connections between sensors and processors. This allows extremely fast frame processing rates (1-10 thousand frames per second) which are required in high speed and scanned imaging systems. The second system presented incorporates inter-chip IR optoelectronic channels which pass transparently through silicon. These links allow communication between three dimensionally stacked chips supporting high throughput interconnect topologies. This paper demonstrates the potential of optoelectronic integrated VLSI systems for providing extremely dense and lightweight solutions in applications such as image processing.


IEEE Photonics Technology Letters | 1997

Improvement in bit-error rate for optoelectronic multicomputer interconnection networks using cyclic redundancy code error detection

Phil May; J. Cross; A. Lopez-Lagunas; B. Buchanan; D.S. Wills; Nan Marie Jokerst; Martin A. Brooke

This letter presents testing results of an integrated optoelectronic (OE) channel employing hop-by-hop error control circuitry based on cyclic redundancy codes (CRC) to improve the effective bit-error rate (BER). The use of OE interconnect in place of wires in multicomputer networks becomes more attractive as channel bandwidth and power efficiency are increased. But these improvements must be accomplished while maintaining an acceptable channel BER. Test results of an integrated OE channel incorporating CRC-based error control circuitry demonstrate a BER reduction of two orders of magnitude while incurring a 20% bandwidth overhead. This may lead to higher bandwidth and higher efficiency OE interconnects.


midwest symposium on circuits and systems | 1994

High density focal plane signal processing using 3-D vertical interconnects

B. Buchanan; C. Camperi-Ginestet; Tonia G. Morris; Martin A. Brooke; Stephen P. DeWeerth; Nan Marie Jokerst; Mark G. Allen

A four by four array of GaAs P-i-N photodetectors was integrated onto a metalized silicon substrate and directly on top of an array of silicon circuits. The resultant focal plane processor at each location in the array converts the incident light intensity to a logarithmically encoded frequency signal.


lasers and electro-optics society meeting | 1994

Three Dimensional Smart Pixel Integration Of A GaAs-based Detector Array Directly On Top Of Silicon Circuits

C. Camperi-Ginestet; B. Buchanan; Yiqin Wang; Nan Marie Jokerst; Martin A. Brooke; Mark G. Allen

A smart pixel imaging array of GaAs-based thin film photodetectors has been integrated in three dimensions directly on top of silicon neuromorphic oscillator circuits. Photomicrographs of the integrated assembly and test results are presented.

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C. Camperi-Ginestet

Georgia Institute of Technology

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D.S. Wills

Georgia Institute of Technology

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S. Fike

Georgia Institute of Technology

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S.T. Wilkinson

Georgia Institute of Technology

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J. Cross

Georgia Institute of Technology

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O. Vendier

Georgia Institute of Technology

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D. Scott Wills

Georgia Institute of Technology

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