Benjamin Blalock

Power Management and Distribution for System on a Chip for Space Applications

In this paper a method for achieving integrated power electronics is discussed. Future spacecraft are projected to feature high levels of integration at the system level (i.e., a “systems on a chip” approach) particularly in areas not typically associated with an integrated approach (such as inertial reference systems, RF communications, imaging, sensors, etc.). Taking full advantage of the miniaturization occurring in these other systems will require commensurate reductions in the size of the power electronics. Power electronics are traditionally larger due to the need for high value passive components requiring significant power handling capabilities. Our approach takes advantage of lower projected power requirements and utilizes integrated, on-chip passives and novel high voltage transistors to achieve adaptive distributed on-chip power management and distribution (PMAD). Operating from a single supply, this on-chip PMAD will operate at power levels of up to 1 W, at frequencies of 110 MHz. INTRODUCTION Integrated systems on future nanosatellites will get their supply voltage from a common power bus. These systems will rely on efficient adaptive on-chip power management circuits for generating the internal voltage levels necessary for operation of the sensors, actuators and other subsystems. For space applications, there are several challenges in building an efficient completely integrated power management system, including a) the development of a new generation of miniaturized large value passive components (inductors and capacitors) for DC-DC converter circuits that can be integrated on-chip, b) the development of on-chip power interrupt protection (such as microbatteries), c) the development of high voltage transistors that can coexist with traditional low voltage transistors in the same radiation hardened silicon substrate, and d) the development of a library of mixed-signal/mixedvoltage CMOS cells suitable for the construction of a completely integrated on-chip power management system. This paper summarizes JPL’s effort in overcoming the challenges of building a completely integrated power management system for future avionics microsystems for deep space applications for NASA. PMAD REQUIREMENTS FOR AVIONICS SYSTEM ON A CHIP Figure 1 shows the block diagram of a proposed on-chip adaptive power management system for the next generation of highly miniaturized satellites. Principle components in this on-chip power management system are switching DC-DC converters with large value onchip inductors and capacitors, micro batteries, battery charge/discharge circuits and digital 110 circuits for interface and control. Digital Interface Bus 12C Main Satellite Power Bus

Radiation-Hardened Circuitry Using Mask-Programmable Analog Arrays. Final Report

As the recent accident at Fukushima Daiichi so vividly demonstrated, telerobotic technologies capable of withstanding high radiation environments need to be readily available to enable operations, repair, and recovery under severe accident scenarios where human entry is extremely dangerous or not possible. Telerobotic technologies that enable remote operation in high dose rate environments have undergone revolutionary improvement over the past few decades. However, much of this technology cannot be employed in nuclear power environments due the radiation sensitivity of the electronics and the organic insulator materials currently in use. This is the final report of the activities involving the NEET 2 project Radiation Hardened Circuitry Using Mask-Programmable Analog Arrays. We present a detailed functional block diagram of the proposed data acquisition system, the thought process leading to technical decisions, the implemented system, and the tested results from the systems. This system will be capable of monitoring at least three parameters of importance to nuclear reactor monitoring: temperature, radiation level, and pressure.

September 2014 Milestone Report

This is a report of the activities involving Task 2 of the NEET 2 project Radiation Hardened Circuitry Using Mask-Programmable Analog Arrays [1]. Using the analog blocks available in our currently pre-configured Via-Configured Array (VCA), we will perform a detailed schematic design of our system to include the signal-processing blocks for temperature, radiation and pressure. Control and data acquisition will be implemented with the Spartan-6 Field-Programmable Gate Array (FPGA) as well as wired serial communications with a remote computer to be used with this project. In addition, batteries and associated voltage regulators will be selected for powering the system. Fabrication may include a polyimide, printed circuit board (PCB) for improved radiation and temperature tolerance. The PCB will go through a layout process by one of the organizations we utilize for this function and be fabricated by another external vendor. Population of the system board will be performed using one of our in-house technicians or an outside vendor we commonly use. Five prototype systems (sensors, electronics board, battery power supply, and personal computer (PC) serial communications port) will be constructed to support the testing objectives of this work. Quality assurance will be performed at each step by both the submitters andmorexa0» the vendors.«xa0less