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Bernhard Fiegl

IBM

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Publication

Featured researches published by Bernhard Fiegl.

Archive | 1997

Manufacturing self-aligned polysilicon fet devices isolated with maskless shallow trench isolation and gate conductor fill technology with active devices and dummy doped regions formed in mesas

Max G. Levy; Bernhard Fiegl; Walter Glashauser; Frank Prein

Archive | 1998

Method of filling shallow trenches

Bernhard Fiegl; Walter Glashauser; Max G. Levy; Victor Ray Nastasi

Archive | 1998

Methods for protecting device components from chemical mechanical polish induced defects

Max G. Levy; Wolfgang Bergner; Bernhard Fiegl; George Richard Goth; Paul C. Parries; Matthew Sendelbach; Tinghao T. Wang; William C. Wille; Juergen Wittmann

Archive | 1998

Method of manufacturing FET devices with maskless shallow trench isolation (STI)

Bernhard Fiegl; Walter Glashauser; Max G. Levy; Frank Prein

Archive | 1998

Methode zum Schutz von Anordnungen gegen durch chemisch-mechanisches Polieren verursachte Fehler Method for protecting arrangements against diseases caused by chemical-mechanical polishing error

Max G. Levy; Bernhard Fiegl; Wolfgang Bergner; George Richard Goth; Paul C. Parries; Matthew Sendelbach; Ting-Hao Wang; William C. Wille; Juergen Wittmann

Archive | 1998

A process for the preparation of FET devices with flat, maskless grave Isolation

Bernhard Fiegl; Walter Glashauser; Max G. Levy; Frank Prein

Archive | 1998

Method of protecting arrangements against diseases caused by chemical mechanical polishing errors

Max G. Levy; Bernhard Fiegl; Wolfgang Bergner; George Richard Goth; Paul C. Parries; Matthew Sendelbach; Ting-Hao Wang; William C. Wille; Juergen Wittmann

Archive | 1998

Method of preventing damage to substrate disposed under pad nitride layer of cmp induced mesa, and manufacture of shallow trench insulating field-effect transistor

Bernhard Fiegl; R Gosse George; Wittmann Juergen; Max G. Levy; J Senderbach Matthew; Paul C. Parries; Wan Tein-Hao; C Will William; Bergner Wolfgang; シー ウィル ウィリアム; ベルクナー ヴォルフガング; アール ゴス ジョージ; ワン ティン−ハオ; フィーグル ベルンハルト; パリース ポール; ジェイ センデルバッハ マシュー; ジー レヴィー マックス; ヴィットマン ユルゲン

Archive | 1998

Verfahren zur Herstellung von FET-Bauelementen mit flacher,maskenloser Grabenisolation Process for the preparation of FET devices with flat, maskless grave isolation

Bernhard Fiegl; Walter Glashauser; Max G. Levy; Frank Prein

Archive | 1998

Verfahren zur Herstellung von FET-Bauelementen mit flacher,maskenloser Grabenisolation

Bernhard Fiegl; Walter Glashauser; Max G. Levy; Frank Prein

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Max G. Levy

IBM

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Walter Glashauser

IBM

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Frank Prein

IBM

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Paul C. Parries

IBM

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George Richard Goth

IBM

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Matthew Sendelbach

IBM

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William C. Wille

IBM

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Ting-Hao Wang

IBM

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Juergen Wittmann

Qimonda

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Wolfgang Bergner

Siemens

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