Bin-Feng Huang

Highly thermal robust NiSi for nanoscale MOSFETs utilizing a novel hydrogen plasma immersion ion implantation and Ni-Co-TiN tri-layer

In this letter, hydrogen plasma immersion ion implantation (H PIII) with Ni-Co-TiN tri-layer is introduced for the first time to enhance the thermal stability of the Ni-silicide for nanoscale CMOS technology. The Ni-silicided poly-Si gate and source/drain showed stable sheet resistance in spite of 650/spl deg/C, 30 min post-silicidation annealing. The junction leakage current is even improved a lot without degradation of device performance using the proposed method.

Novel Nitrogen Doped Ni Self-Alingned Silicide Process for Nanoscale Complementary Metal Oxide Semiconductor Technology

In this paper, 1%-nitrogen doped nickel was proposed to improve the thermal stability of Ni-silicide for nano-scale N-type Metal Oxide Semiconductor Field Effect Transistor. It is shown that thermal stability of nickel silicide is improved a lot by the Nitrogen incorporation in NiSi layer using the 1%-nitrogen doped nickel target. Even after post-silicidation annealing at 650°C for 30 min, the low resistivity NiSi with low junction leakage current can be achieved. Moreover, improved device characteristics such as threshold voltage, transconductance, and on-off current, subthreshold slope were obtained in 80 nm NMOSFET.

Characterization of Nickel-Silicide Dependence on the Substrate Dopants for Nanoscale Complementary Metal Oxide Semiconductor Technology

In this paper, the dependency of silicide properties such as sheet resistance and cross-sectional profile of NiSi on the source/drain and gate dopants is described. There was minimal difference in sheet resistance among the dopants used, namely, As, P, BF2 and B11, just after the formation of NiSi using RTP. However, NiSi properties strongly depended on the dopants when additional thermal treatment was applied after silicidation. P-type dopants showed superior properties compared to n-type dopants, and BF2-doped silicon showed the most stable property, while As-doped silicon, the poorest. The principal reason for the excellent properties of the BF2-doped sample is the retarded Ni diffusion due to the existence of fluorine. In contrary, the As-doped sample showed severe agglomeration and abnormal oxidation of NiSi possibly due to the As sublimation.

Abnormal oxidation of nickel silicide on N-type substrate and effect of preamorphization implantation

In this study, the abnormal oxidation of nickel silicide on an n-type substrate and the suppression of the abnormal oxidation by N2 preamorphization implantation (PAI) have been investigated. Although there is little difference in the sheet resistance regardless of dopants just after the silicidation, a strong dependence was observed after high-temperature postsilicidation annealing. Only the As-doped source/drain was oxidized during the postsilicidation annealing, and silicide properties were severely degraded. To prevent the unintended oxidation of the As-doped source/drain, N2 or Ge PAI was implemented and the thermal stability was greatly improved by N2 PAI with a Ti capping layer.

Abnormal Oxidation of NiSi Formed on Arsenic-Doped Substrate

Nickel silicide is a most up-to-date self-aligned silicide (salicide) technology for nanoscale complementary metal-oxide-semiconductor field-effect transistors. However, an unintended oxidation of nickel silicide happenedonly on As-doped substrate. This abnormal oxidation phenomenon occurred only when the annealing temperature was higher than 613°C (sublimation point of As). The main reason for the oxidation is believed to the thermal energy that induces the diffusion of Ni from the nickel silicide to the substrate direction. Due to the oxidation, nickel silicide on As-doped substrate showed poor thermal stability contrasted to BF 2 -doped substrate.

Co-Induced Low-Temperature Silicidation of Ni Germanosilicide Using NiPt Alloy and the Effect of Ge Ratio on Thermal Stability

In this paper, novel Ni germanosilicide technology using NiPt alloy and Co overlayer has been proposed. Using the Co overlayer after NiPt deposition on Si1-xGex, the formation temperature of low resistive Ni germanosilicide is lowered with high thermal stability. The thermal stability of Ni germanosilicide with different Ge fraction in is also characterized. The sheet resistance degrades as increasing the Ge fraction (x) in Si1-xGex when NiPt/TiN is used. However, using the Co overlayer, the sheet resistance property among Ni germanosilicide formed with different Ge fraction is improved greatly compared with those of NiPt/TiN case (without Co overlayer). Therefore, low-temperature formation of highly thermal robust Ni germanosilicide can be achieved through the NiPt/Co/TiN tri-layer.

Thermally Robust Nickel Silicide Process for Nano-Scale CMOS Technology

A novel NiSi technology with bi-layer Co/TiN structure as a capping layer is proposed for the highly thermal immune Ni Silicide technology. Much better thermal immunity of Ni Silicide was certified up to 700°C, 30 min post silicidation furnace annealing by introducing Co/TiN bi-layer capping. The proposed structure is successfully applied to nano-scale CMOSFET with a gate length of 80 nm. The sheet resistance of nano-scale gate poly shows little degradation even after the high temperature furnace annealing of 650°C, 30 min. The Ni/Co/TiN structure is very promising for the nano-scale MOSFET technology which needs the ultra shallow junction and high temperature post silicidation processes.

Optimal Ni/Co thickness extraction and two step rapid thermal process of the nickel-silicide for nanoscale complementary metal oxide semiconductor (CMOS) application

NiSi is an attractive silicide material to be applied in the nanoscale CMOSFETs. However, degradation of NiSi film after the post-silicidation annealing is one of serious demerits of NiSi. Ni/Co bi-layer is known as one of the most stable silicide structure for the improvement of the thermal stability. The formed bi-layer consists of the upper protection layer (CoSi/sub x/) and the lower conduction layer (NiSi) and their roles are different from each other. In this study, optimization of Ni/Co ratio and process condition is investigated for the nanoscale CMOSFETs.

Highly thermal robust Ni-germanosilicide utilizing NiPt/Co/TiN tri-layer for CMOS application

Highly thermal robust Ni-germanosilicide has been developed using the novel NiPt/Co/TiN tri-layer. Ni-germanosilicide properties were characterized with different source/drain dopants and Ge concentrations for nanoscale CMOSFETs application. The sheet resistance was degraded as the Ge concentration increases in Si/sub 1-x/Ge/sub x/. Low temperature silicidation and wide range of RTP process window are achieved as well as the improvement of the thermal stability according to different dopant types by the subsequent Co and TiN capping layer above NiPt on Si/sub 1-x/Ge/sub x/.

Improvement of thermal stability of Ni germano-silicide for nano-scale CMOS technology

In this paper, to enhance the thermal stability of the Ni germano-silicide especially on the doped substrate, various kinds of tri-layer structures of Ti/Ni/TiN, Ni/Ti/TiN, Co/Ni/TiN and Ni/Co/TiN were applied. Contrary to the conventional Ni silicide, two-step RTP is also applied to enhance the thermal stability of Ni germano-silicide. Among these structures, a highly stable Ni germano-silicide can be formed by Ni/Co/TiN with high Co concentration along with 2-step RTP. Co/Ni/TiN and Ti/Ni/TiN, especially Co/Ni/TiN with high Co concentration using 2-step RTP, are found to be effective in preventing the abnormal increase of sheet resistance on the As doped substrate during post-silicidation annealing higher than 613/spl deg/C.