Hee-Hwan Ji

Highly thermal robust NiSi for nanoscale MOSFETs utilizing a novel hydrogen plasma immersion ion implantation and Ni-Co-TiN tri-layer

In this letter, hydrogen plasma immersion ion implantation (H PIII) with Ni-Co-TiN tri-layer is introduced for the first time to enhance the thermal stability of the Ni-silicide for nanoscale CMOS technology. The Ni-silicided poly-Si gate and source/drain showed stable sheet resistance in spite of 650/spl deg/C, 30 min post-silicidation annealing. The junction leakage current is even improved a lot without degradation of device performance using the proposed method.

The Effect of Triple Capping Layer ( Ti ∕ Ni ∕ TiN ) on the Electrical and Structural Properties of Nickel Monosilicide

The effects of a triple capping layer (Ti/Ni/TiN) on the electrical and structural properties of nickel monosilicide (NiSi) have been investigated as a function of rapid thermal annealing temperature. It is shown that thesamples with the triple capping layer produce lower sheet resistances than the samples with double (Ti/TiN) or single (TiN) capping layers across the whole annealing temperature range. Scanning transmission electron microscopy results show that, after annealing, interfacial layers consisting of Ni, Ti, and Si elements are formed in the samples with the triple and double capping layers. It is further shown that the triple-capped samples are more thermally stable than the double- and single-capped samples. This could be attributed to the segregation of Ti atoms in grain boundaries of NiSi film, which reduces grain boundary energy. The simple model is presented to explain the influence of Ti reaction flux on the surface morphology and the interface uniformity between the silicide and Si substrate.

Novel Nitrogen Doped Ni Self-Alingned Silicide Process for Nanoscale Complementary Metal Oxide Semiconductor Technology

In this paper, 1%-nitrogen doped nickel was proposed to improve the thermal stability of Ni-silicide for nano-scale N-type Metal Oxide Semiconductor Field Effect Transistor. It is shown that thermal stability of nickel silicide is improved a lot by the Nitrogen incorporation in NiSi layer using the 1%-nitrogen doped nickel target. Even after post-silicidation annealing at 650°C for 30 min, the low resistivity NiSi with low junction leakage current can be achieved. Moreover, improved device characteristics such as threshold voltage, transconductance, and on-off current, subthreshold slope were obtained in 80 nm NMOSFET.

Characterization of Nickel-Silicide Dependence on the Substrate Dopants for Nanoscale Complementary Metal Oxide Semiconductor Technology

In this paper, the dependency of silicide properties such as sheet resistance and cross-sectional profile of NiSi on the source/drain and gate dopants is described. There was minimal difference in sheet resistance among the dopants used, namely, As, P, BF2 and B11, just after the formation of NiSi using RTP. However, NiSi properties strongly depended on the dopants when additional thermal treatment was applied after silicidation. P-type dopants showed superior properties compared to n-type dopants, and BF2-doped silicon showed the most stable property, while As-doped silicon, the poorest. The principal reason for the excellent properties of the BF2-doped sample is the retarded Ni diffusion due to the existence of fluorine. In contrary, the As-doped sample showed severe agglomeration and abnormal oxidation of NiSi possibly due to the As sublimation.

On-chip charge pumping method for characterization of interface states of ultra thin gate oxide in nano CMOS technology

For the first time, on-chip charge pumping method is proposed to characterize ultra thin gate oxide for nano-scale CMOSFETs. Designed on-chip charge pumping system can supply 30-500MHz square-type pulse waves to DUT transistor and measured charge pumping current showed no gate tunneling current dependency which can be easily monitored in very thin gate oxide. In addition to the measurement of interface states by fixed-amplitude method, the distribution of interface states in channel region can be easily extracted by fixed-base method using this system. The proposed method is also successfully applied to analyze hot-carrier stress-induced threshold voltage (Vt)-degradation and to evaluate plasma process induced damage in terms of interface trap density

Abnormal oxidation of nickel silicide on N-type substrate and effect of preamorphization implantation

In this study, the abnormal oxidation of nickel silicide on an n-type substrate and the suppression of the abnormal oxidation by N2 preamorphization implantation (PAI) have been investigated. Although there is little difference in the sheet resistance regardless of dopants just after the silicidation, a strong dependence was observed after high-temperature postsilicidation annealing. Only the As-doped source/drain was oxidized during the postsilicidation annealing, and silicide properties were severely degraded. To prevent the unintended oxidation of the As-doped source/drain, N2 or Ge PAI was implemented and the thermal stability was greatly improved by N2 PAI with a Ti capping layer.

Abnormal Oxidation of NiSi Formed on Arsenic-Doped Substrate

Nickel silicide is a most up-to-date self-aligned silicide (salicide) technology for nanoscale complementary metal-oxide-semiconductor field-effect transistors. However, an unintended oxidation of nickel silicide happenedonly on As-doped substrate. This abnormal oxidation phenomenon occurred only when the annealing temperature was higher than 613°C (sublimation point of As). The main reason for the oxidation is believed to the thermal energy that induces the diffusion of Ni from the nickel silicide to the substrate direction. Due to the oxidation, nickel silicide on As-doped substrate showed poor thermal stability contrasted to BF 2 -doped substrate.

Characterization of the Co-Silicide Penetration Depth into the Junction Area for 0.15 and Sub-0.15 Micron CMOS Technology.

The penetration depth of cobalt silicide layer in shallow junction is assessed using the current–voltage curve both in reverse and forward bias regions. The reverse leakage current characteristics said that silicide has affected both of the areal and peripheral intensive n+/p diodes because the leakage current is increased about one order of magnitude by silicidation. In case of p+/n junction, there is no increase of reverse leakage current. In case of forward region, however, only the forward current of peripheral intensive diode was increased by silicidation. From the different junction current behavior in forward and reverse bias region, it can be said that the penetrated depth of silicide layer is almost near to the space charge region but not into it for area diode. However, in case of peripheral intensive diode, silicide has penetrated into the space charge region. The Schottky contact area formed by silicide penetration is extracted as 3.02 µm2. The extracted Schottky barrier for n+/p parameter diode is 0.63 eV which is quite similar to the theoretical value of 0.64 eV.

Thermal Stability Improvement of Ni–Germano silicide Utilizing Ni–Pd Alloy for Nanoscale CMOS Technology

In this paper, thermally stable Ni-germanosilicide technology utilizing Ni-Pd alloy and Co/TiN capping layer (Ni-Pd/Co/TiN tri-layer) is proposed for high performance strained-Si CMOS technology. The proposed Ni-germanosilicide technology exhibits low temperature silicidation with a wide temperature window for rapid thermal process (RTP). Moreover, sheet resistance shows stable characteristics in spite of the high temperature postsilicidation annealing up to 700 for 30 min. In addition, the surface of Ni-Pd/Co/TiN structure is much smoother than that of Ni/Co/TiN structure for both before and after the postsilicidation annealing. Therefore, the Ni-germanosilicide using the Ni-Pd/Co/TiN tri-layer is highly promising for future SiGe based nanoscale CMOS technology.

Co-Induced Low-Temperature Silicidation of Ni Germanosilicide Using NiPt Alloy and the Effect of Ge Ratio on Thermal Stability

In this paper, novel Ni germanosilicide technology using NiPt alloy and Co overlayer has been proposed. Using the Co overlayer after NiPt deposition on Si1-xGex, the formation temperature of low resistive Ni germanosilicide is lowered with high thermal stability. The thermal stability of Ni germanosilicide with different Ge fraction in is also characterized. The sheet resistance degrades as increasing the Ge fraction (x) in Si1-xGex when NiPt/TiN is used. However, using the Co overlayer, the sheet resistance property among Ni germanosilicide formed with different Ge fraction is improved greatly compared with those of NiPt/TiN case (without Co overlayer). Therefore, low-temperature formation of highly thermal robust Ni germanosilicide can be achieved through the NiPt/Co/TiN tri-layer.