Han-Seob Cha

Highly thermal robust NiSi for nanoscale MOSFETs utilizing a novel hydrogen plasma immersion ion implantation and Ni-Co-TiN tri-layer

In this letter, hydrogen plasma immersion ion implantation (H PIII) with Ni-Co-TiN tri-layer is introduced for the first time to enhance the thermal stability of the Ni-silicide for nanoscale CMOS technology. The Ni-silicided poly-Si gate and source/drain showed stable sheet resistance in spite of 650/spl deg/C, 30 min post-silicidation annealing. The junction leakage current is even improved a lot without degradation of device performance using the proposed method.

Novel Nitrogen Doped Ni Self-Alingned Silicide Process for Nanoscale Complementary Metal Oxide Semiconductor Technology

In this paper, 1%-nitrogen doped nickel was proposed to improve the thermal stability of Ni-silicide for nano-scale N-type Metal Oxide Semiconductor Field Effect Transistor. It is shown that thermal stability of nickel silicide is improved a lot by the Nitrogen incorporation in NiSi layer using the 1%-nitrogen doped nickel target. Even after post-silicidation annealing at 650°C for 30 min, the low resistivity NiSi with low junction leakage current can be achieved. Moreover, improved device characteristics such as threshold voltage, transconductance, and on-off current, subthreshold slope were obtained in 80 nm NMOSFET.

Void formation during silicidation and its influence on the thermal stability of cobalt silicide

Void formation during silicidation and its influence on the thermal stability of CoSi2 on the poly-Si were investigated. Visible voids were found at the interface of CoSi2/poly-Si on the BF2 doped poly-Si but not on the boron doped one. Void formation during silicidation could be suppressed effectively by two methods: preventing oxidation of poly-Si during dopant activation annealing or removing surface SiOx(Fy) compounds sufficiently in dilute HF before cobalt deposition. It was found that the thermal stability of CoSi2 on the BF2 doped poly-Si with the interface voids was much better than that on the boron doped one or BF2 doped one, without the interface voids. It is verified that interface void formation during silicidation improves the thermal stability of CoSi2 by suppressing the grain grooving from the interface due to the increase of interface energy.

Thermal Stability Improvement of Ni–Germano silicide Utilizing Ni–Pd Alloy for Nanoscale CMOS Technology

In this paper, thermally stable Ni-germanosilicide technology utilizing Ni-Pd alloy and Co/TiN capping layer (Ni-Pd/Co/TiN tri-layer) is proposed for high performance strained-Si CMOS technology. The proposed Ni-germanosilicide technology exhibits low temperature silicidation with a wide temperature window for rapid thermal process (RTP). Moreover, sheet resistance shows stable characteristics in spite of the high temperature postsilicidation annealing up to 700 for 30 min. In addition, the surface of Ni-Pd/Co/TiN structure is much smoother than that of Ni/Co/TiN structure for both before and after the postsilicidation annealing. Therefore, the Ni-germanosilicide using the Ni-Pd/Co/TiN tri-layer is highly promising for future SiGe based nanoscale CMOS technology.

Co-Induced Low-Temperature Silicidation of Ni Germanosilicide Using NiPt Alloy and the Effect of Ge Ratio on Thermal Stability

In this paper, novel Ni germanosilicide technology using NiPt alloy and Co overlayer has been proposed. Using the Co overlayer after NiPt deposition on Si1-xGex, the formation temperature of low resistive Ni germanosilicide is lowered with high thermal stability. The thermal stability of Ni germanosilicide with different Ge fraction in is also characterized. The sheet resistance degrades as increasing the Ge fraction (x) in Si1-xGex when NiPt/TiN is used. However, using the Co overlayer, the sheet resistance property among Ni germanosilicide formed with different Ge fraction is improved greatly compared with those of NiPt/TiN case (without Co overlayer). Therefore, low-temperature formation of highly thermal robust Ni germanosilicide can be achieved through the NiPt/Co/TiN tri-layer.

Highly thermal immune nitrogen-doped Ni-germanosilicide with Co/TiN double layer for nano-scale complementary metal oxide semiconductor applications

In this study, a highly thermal immune Ni–germanosilicide utilizing a 1%-nitrogen-doped nickel and a Co/TiN double capping layer is proposed for nano-scale complementary metal oxide semiconductor field effect transistors (CMOSFETs). It is shown that thermal stability of Ni–germanosilicide is improved a lot by the nitrogen incorporation in Ni–germanosilicide film using the 1%-nitrogen-doped nickel target and Co/TiN double capping layer. Even after the post-silicidation annealing at 600 °C for 30 min, low resistivity Ni–germanosilicide can be achieved. It is believed that the nitrogen atoms in 1%-nitrogen-doped nickel are incorporated in the Ni–germanosilicide during silicidation and formed a nitride compound at the grain boundaries of Ni–germanosilicide and the Ni–germanosilicide/SiGe interface.

Thermally Robust Nickel Silicide Process for Nano-Scale CMOS Technology

A novel NiSi technology with bi-layer Co/TiN structure as a capping layer is proposed for the highly thermal immune Ni Silicide technology. Much better thermal immunity of Ni Silicide was certified up to 700°C, 30 min post silicidation furnace annealing by introducing Co/TiN bi-layer capping. The proposed structure is successfully applied to nano-scale CMOSFET with a gate length of 80 nm. The sheet resistance of nano-scale gate poly shows little degradation even after the high temperature furnace annealing of 650°C, 30 min. The Ni/Co/TiN structure is very promising for the nano-scale MOSFET technology which needs the ultra shallow junction and high temperature post silicidation processes.

Optimal Ni/Co thickness extraction and two step rapid thermal process of the nickel-silicide for nanoscale complementary metal oxide semiconductor (CMOS) application

NiSi is an attractive silicide material to be applied in the nanoscale CMOSFETs. However, degradation of NiSi film after the post-silicidation annealing is one of serious demerits of NiSi. Ni/Co bi-layer is known as one of the most stable silicide structure for the improvement of the thermal stability. The formed bi-layer consists of the upper protection layer (CoSi/sub x/) and the lower conduction layer (NiSi) and their roles are different from each other. In this study, optimization of Ni/Co ratio and process condition is investigated for the nanoscale CMOSFETs.

Thermal Stability improvement of Nickel Germanosilicide Utilizing Ni-Ta Alloy and Co/TiN Cappling layer for Nano-scale CMOS Technology

In this paper, highly thermal stable nickel germanosilicide utilizing Ni-Ta alloy and Co/TiN capping layer (Ni-Ta/Co/TiN tri-layer) is proposed for high performance strained Si CMOS technology. The proposed Nickel Germanosilicide utilizing Ni-Ta/Co/ TiN structure exhibits low temperature silicidation and wide range of rapid thermal process (RTP) process window. Moreover, sheet resistance shows stable characteristics up to 700degC for 30 min high temperature annealing and the surface of Ni-Ta/Co/TiN structure is much smoother than that of Ni/Co/TiN structure both after RTP and post-silicidation annealing. Therefore, the thermal immune nickel germanosilicide using the Ni-Ta/Co/TiN tri-layer is highly promising for future SiGe based nano-scale CMOS technology

Ni/Co/Ni/TiN structure for highly thermal immune NiSi for CMOSFETs application

In this paper, a novel Ni/Co/Ni/TiN structure to improve the thermal stability of NiSi by forming highly thermal stable ternary phase, i.e., (Co/sub x/Ni/sub 1-x/)Si/sub 2/ especially at the top region of NiSi is proposed. The Ni/Co/Ni/TiN structure is very promising for the nanoscale MOSFET technology which needs the ultra shallow junction and high temperature post silicidation processes.