Bon-Hyun Ku

6-bit CMOS Digital Attenuators With Low Phase Variations for

This paper presents 6-bit CMOS digital step attenuators with low phase variations. To mitigate the insertion phase variation of conventional switched Pi/T attenuators, the proposed attenuators employ a compensation circuit. This includes a low-pass filter for phase/amplitude correction. Analysis and comparison of two types of Pi-attenuators with the inductive and capacitive correction circuits are described. The two types of attenuators are fabricated using a 0.18-μm CMOS process. The attenuators have a maximum attenuation range of 31.5 dB with 0.5-dB steps (64 states). The attenuators with the inductive and capacitive correction structures, respectively, exhibit root mean square (rms) amplitude errors of less than 0.3 and 0.4 dB, and rms phase errors of less than 3.5° and 2° at 8-12 GHz. The insertion losses are 8.7 and 10.5 dB at 10 GHz, respectively. The input 1-dB compression points are 15 and 13 dBm at 10 GHz, and the total chip sizes, excluding pads, are 1.25 × 0.4 mm2 and 0.67 × 0.5 mm2.

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This paper presents a wideband transformer-coupled CMOS power amplifier (PA). On-chip transmission-line transformers are used as key components of matching networks at output, input, and interstage. The wideband on-chip transformer is harnessed without any additional inductive devices so that a wideband power characteristic can be achieved. The PA is fabricated using a 0.18-μm CMOS process. It provides a saturated output power of 21.5 dBm with the power-added efficiency (PAE) of 20.3%, and the output 1-dB gain-compressed power (P1 dB) is 20.2 dBm with the PAE of 14.8% at 9.5 GHz, respectively. The small-signal gain is 25.3 dB and the 3-dB bandwidth is 6.5 GHz (6.5-13 GHz). The die area is 1.34 mm × 0.47 mm. Among the reported X/Ku-band CMOS PAs, this amplifier achieves the highest figure of merit, and also shows suitable performances for phased-array systems.

-Band Phased-Array Systems

A X-band CMOS power amplifier (PA) has been fabricated using a 0.18-mum CMOS technology. On-chip transmission line transformers are used as matching elements for output, input, and inter-stage matching. The power amplifier provides the saturated output power of 23.5 dBm and 1-dB gain-compressed output power (P1dB) is 21 dBm at 8.5 GHz with 3.3 V supply. The gain is 29 dB and power-added-efficiency (PAE) is 19 % at 8.5 GHz. Among the reported X/Ku band CMOS power amplifiers, this amplifier has the largest output power.

A Wideband Transformer-Coupled CMOS Power Amplifier for

A fully integrated CMOS RF power amplifier for a 1.8 GHz band EDGE polar transmitter is presented. It is implemented with 0.18-mum CMOS process. The output power is 33.4 ~ 33.5 dBm and the power added efficiency is 39 ~ 41 percent when the frequency varies from 1.71 to 1.91 GHz. The dynamic range is increased by 12 dB with the use of the proposed switchable transformer, which meets the EDGE dynamic range requirement of 37 dB when the supply voltage changes from 0.8 to 3.3 V.

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The proposed VCO achieves low phase noise with high oscillation amplitude by using a high impedance resonator. This resonator has two resonances including the resonance of an additional inductance and a device output capacitance. The proposed VCO is implemented with a 0.13-µm CMOS process and the chip size without the pad is 150um × 250um. The VCO shows phase noise of −94.83dBc/Hz at 1MHz offset, −13.33dBm output power at 55.63GHz oscillation frequency, and the power dissipation of 8.25mW including that of the buffer. In order to provide a comparison with a VCO with a conventional resonator, two VCOs with different resonators are designed. The proposed VCO shows 7.5dB higher output power and 11dB lower phase noise than the VCO with a conventional resonator. The proposed VCO can provide high performance for millimeter wave band applications.

-Band Multifunction Chips

This paper presents a direct-conversion transceiver technology for full digital DS-UWB applications. It is implemented in 0.18 []m CMOS technology and total current consumption is 143 mA including PLL, VCO. The full chip size is 9 mm2, packaged in MLF 64 pin.

A X-band CMOS power amplifier with on-chip transmission line transformers

A 77 GHz CMOS medium power amplifier (PA) with high efficient matching networks based on transformer is presented. The unit transistor size of a power cell is selected by analyzing its maximum available gain. The broadside-coupled Transmission-Line Transformers (TLTs) are implemented as matching networks for low insertion loss and wide band matching characteristics. The PA is fabricated using a 65-nm RF CMOS process. The saturated output power and the peak power-added efficiency at 76.5GHz is 12.8 dBm and 8%, respectively. The DC power consumption is 236 mW with a supply voltage of 2.0V.