Camilla Kärnfelt

Highly integrated 60 GHz transmitter and receiver MMICs in a GaAs pHEMT technology

Highly integrated transmitter and receiver MMICs have been designed in a commercial 0.15 /spl mu/m, 88 GHz f/sub T//183 GHz f/sub MAX/ GaAs pHEMT MMIC process and characterized on both chip and system level. These chips show the highest level of integration yet presented in the 60 GHz band and are true multipurpose front-end designs. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.5 GHz. Although the chips are inherently multipurpose designs, they are especially suitable for high-speed wireless data transmission due to their very broadband IF characteristics. The single-chip transmitter MMIC consists of a balanced resistive mixer with an integrated ultra-wideband IF balun, a three-stage power amplifier, and the X8 LO chain. The X8 is a multifunction design by itself consisting of a quadrupler, a feedback amplifier, a doubler, and a buffer amplifier. The transmitter chip delivers 3.7/spl plusmn/1.5 dBm over the RF frequency range of 54-61 GHz with a peak output power of 5.2 dBm at 57 GHz. The single-chip receiver MMIC contains a three-stage low-noise amplifier, an image reject mixer with an integrated ultra-wideband IF hybrid and the same X8 as used in the transmitter chip. The receiver chip has 7.1/spl plusmn/1.5 dB gain between 55 and 63 GHz, more than 20 dB of image rejection ratio between 59.5 and 64.5 GHz, 10.5 dB of noise figure, and -11 dBm of input-referred third-order intercept point (IIP3).

60 GHz Single-Chip Front-End MMICs and Systems for Multi-Gb/s Wireless Communication

Single-chip 60 GHz transmitter (TX) and receiver (RX) MMICs have been designed and characterized in a 0.15mum (fT~ 120 GHz/f MAX> 200 GHz) GaAs mHEMT MMIC process. This paper describes the second generation of single-chip TX and RX MMICs together with work on packaging (e.g., flip-chip) and system measurements. Compared to the first generation of the designs in a commercial pHEMT technology, the MMICs presented in this paper show the same high level of integration but occupy smaller chip area and have higher gain and output power at only half the DC power consumption. The system operates with a LO signal in the range of 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO multiplier chain, resulting in an IF center frequency of 2.5 GHz. Packaging and interconnects are discussed and as an alternative to wire bonding, flip-chip assembly tests are presented and discussed. System measurements are also described where bit error rate (BER) and eye diagrams are measured when the presented TX and RX MMICs transmits and receives a modulated signal. A data rate of 1.5 Gb/s with simple ASK modulation was achieved, restricted by the measurement setup rather than the TX and RX MMICs. These tests indicate that the presented MMICs are especially well suited for transmission and reception of wireless signals at data rates of several Gb/s

Single-Chip Frequency Multiplier Chains for Millimeter-Wave Signal Generation

Two single-chip frequency multiplier chains targeting 118 and 183 GHz output frequencies are presented. The chips are fabricated in a 0.1 ¿m GaAs metamorphic high electron-mobility transistor process. The D-band frequency doubler chain covers 110 to 130 GHz with peak output power of 5 dBm. The chip requires 2 dBm input power and consumes only 65 mW of dc power. The signal at the fundamental frequency is suppressed more than 25 dB compared to the desired output signal over the band of interest. The G-band frequency sextupler (×6) chain covers 155 to 195 GHz with 0 dBm peak output power and requires 6.5 dBm input power and 92.5 mW dc power. The input signal to the multiplier chain can be reduced to 4 dBm while the output power drops only by 0.5 dB. The unwanted harmonics are suppressed more than 30 dB compared to the desired signal. An additional 183 GHz power amplifier is presented to be used after the ×6 frequency multiplier chain if higher output power is required. The amplifier delivers 5 dBm output power with a small-signal gain of 9 dB from 155 to 195 GHz. The impedance matching networks are realized using coupled transmission lines which is shown to be a scalable and straightforward structure to use in amplifier design. Microstrip transmission lines are used in all the designs.

High-purity 60-GHz-band single-chip /spl times/8 multipliers in pHEMT and mHEMT technology

Two single-chip multiplier by eight (times8) monolithic microwave integrated circuits (MMICs) for 52-62-GHz output frequency are presented. The MMICs are designed and manufactured in commercial 0.15-mum pseudomorphic high-electron mobility transistor (pHEMT) and metamorphic HEMT (mHEMT) processes for the comparison of functionality and performance. The multipliers consist of a quadrupler stage followed by a high-pass filter, an interstage amplifier, and a doubler stage. The required output power is achieved by a buffer amplifier on the output. An output power of 8 dBm is achieved in both designs at 7.35-GHz input frequency with 0-dBm input power. The detected degradation of phase noise due to the circuit is less than 1 dB at 100-kHz offset from the carrier compared to the theoretical value for a multiplier by eight. The total power dissipation of the pHEMT design is 450 mW. The mHEMT-based multiplier has significantly lower power dissipation of only 210 mW. To the best of our knowledge, these are the first reported multiplier-by-eight MMICs based on pHEMT and mHEMT technology

60 GHz Broadband MS-to-CPW Hot-Via Flip Chip Interconnects

In this letter, the microstrip-to-coplanar waveguide (MS-to-CPW) hot-via flip chip interconnect has been experimentally demonstrated to have broadband performance from dc to 67 GHz. The interconnect structures with the hot-via transitions were first designed and optimized by using the electromagnetic simulation tool. Three types of designs were investigated in this letter. The interconnect structures were then fabricated and radio frequency (RF) tested up to 67GHz. The optimized interconnect structure with the compensation design demonstrated excellent RF characteristics with the insertion loss less than 0.5dB and the return loss below 18dB over a very broad bandwidth from dc to 67GHz. This is to our knowledge the best result reported for this frequency range.

Radio-over-Fibre access for sustainable Digital Cities

Pervasive broadband access will transform cities to the net social, environmental and economic benefit of the e-City dweller as did the introduction of utility and transport network infrastructures. Yet without action, the quantity of greenhouse gas emissions attributable to the increasing energy consumption of access networks will become a serious threat to the environment. This paper introduces the vision of a ‘sustainable Digital City’ and then considers strategies to overcome economic and technical hurdles faced by engineers responsible for developing the information and communications technology (ICT) network infrastructure of a Digital City. In particular, ICT energy consumption, already an issue from an operating cost perspective, is responsible for 3 % of global energy consumption and is growing unsustainably. A grand challenge is to conceive of networks, systems and devices that together can cap wireless network energy consumption whilst accommodating growth in the number of subscribers and the bandwidth of services. This paper provides some first research directions to tackle this grand challenge. A distributed antenna system with radio frequency (RF) transport over an optical fibre (or optical wireless in benign environments) distribution network is identified as best suited to wireless access in cluttered urban environments expected in a Digital City from an energy consumption perspective. This is a similar architecture to Radio-over-Fibre which, for decades, has been synonymous with RF transport over analogue intensity-modulated direct detection optical links. However, it is suggested herein that digital coherent optical transport of RF holds greater promise than the orthodox approach. The composition of the wireless and optical channels is then linear, which eases the digital signal processing tasks and permits robust wireless protocols to be used end-to-end natively which offers gains in terms of capacity and energy efficiency. The arguments are supported by simulation studies of distributed antenna systems and digital coherent Radio-over-Fibre links.

77 GHz ACC radar simulation platform

The development of a system simulation platform for adaptive cruise control (ACC) radar working at 77 GHz is presented. The simulation platform allows us to test different radar architectures, modulation formats and detection algorithms as well as to simulate different scenarios, which improves the decision-making before and during the hardware development.

Single-Chip 60 GHz Transmitter and Receiver MMICs in a GaAs mHEMT Technology

Single-chip 60 GHz transmitter (TX) and receiver (RX) MMICs have been designed and characterized in a 0.15 mum, ~120 GHz fT/> 200 GHz fMAX GaAs mHEMT MMIC process. This paper describes the second generation of single-chip TX and RX MMICs developed in our group. Compared to our first designs in a commercial pHEMT technology, the MMICs presented in this paper show the same high level of integration but occupy smaller chip area and have higher gain and output power at only half of the DC power consumption. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (times8) LO chain, resulting in an IF center frequency of 2.5 GHz. The single chip TX MMIC consists of a balanced resistive mixer with an integrated ultra wideband IF balun, a three-stage amplifier and the times8 LO chain. The times8 is a multifunction design by itself consisting of a quadrupler, a feed back amplifier, a doubler, and a buffer amplifier. The TX chip delivers 4.1 plusmn 1.5 dBm over an RF frequency range of 56.5 to 64.5 GHz. The peak output power is 5.6 dBm measured at 60 GHz and the overall TX chip consumes 420 mW of DC power. The single chip RX MMIC contains a three-stage low noise amplifier, an image reject mixer with an integrated ultra wideband IF hybrid and the same times8 as used in the TX chip. The RX chip has more than 10.7 dB gain between 54.5 and 64.5 GHz and more than 13 dB of image rejection ratio between 57.5 and 67.5 GHz with a peak image rejection ratio of 22.5 dB at 64 GHz. The input referred third order intercept point, IIP3 is measured to -10 dBm at 60 GHz and the overall RX chip consumes 450 mW of DC power

Attempt of the metallic 3D printing technology for millimeter-wave antenna implementations

3D metallic printing technology is attempted to implement millimeter-wave (mmWave) antennas. Based on laser beam melting (LBM) technology, the cost and turnaround time of metallic horn antenna fabrication is effectively reduced compared with traditional milling and injection moulding. A conical and a pyramidal horn antenna are printed in 316L stainless steel, both of which demonstrate satisfactory performance compared with simulation, as well as comparable performance with commercial horn antennas. Surface roughness of the printed horn antennas are measured and analyzed, showing improvement upon former designs. The 3D printing technology proves its great potential for further exploration.

Design, Fabrication, and Characterization of Novel Vertical Coaxial Transitions for Flip-Chip Interconnects

In this paper, a novel transition design using vertical ldquocoaxial transitionrdquo for coplanar waveguide (CPW-to-CPW) flip-chip interconnect is proposed and presented for the first time. The signal continuity is greatly improved since the coaxial-type transition provides more return current paths compared to the conventional transition in the flip-chip structure. The proposed coaxial transition structure shows a real coaxial property from the 3-D electromagnetic wave simulation results. The design rules for the coaxial transition are presented in detail with the key parameters of the coaxial transition structure discussed. For demonstration, the back-to-back flip-chip interconnect structures with the vertical coaxial transitions have been successfully fabricated and characterized. The demonstrated interconnect structure using the coaxial transition exhibits the return loss below 25 dB and the insertion loss within 0.4 dB from dc to 40 GHz. Furthermore, the measurement and simulation results show good agreement. The novel coaxial transition demonstrates excellent interconnect performance for flip-chip interconnects and shows great potential for flip-chip packaging applications at millimeter waves.