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Featured researches published by Carlo Riva.


IEEE Transactions on Electron Devices | 1995

Modeling of the intrinsic retention characteristics of FLOTOX EEPROM cells under elevated temperature conditions

C. Papadas; George Pananakakis; G. Ghibaudo; Carlo Riva; Federico Pio; Paolo Ghezzi

A model for the intrinsic retention characteristics of FLOTOX EEPROM cells is presented, which is based on the temperature dependence of the Fowler-Nordheim emission current. This model which has been successfully tested on single-poly-FLOTOX EEPROM cells, enables the device lifetime to be calculated for given memory operating conditions, instead of being extrapolated as is usually done. The sensitivity of the retention characteristics to several technological parameters is also investigated. It is expected that this intrinsic retention model (with minor modifications) will also be applicable to FLASH EEPROM cells. >


Solid-state Electronics | 1994

On the charge build-up mechanisms in gate dielectrics

C. Papadas; G. Ghibaudo; Federico Pio; C. Monsérié; G. Pananakakis; P. Mortini; Carlo Riva

Abstract The variation of the bulk oxide charge build-up characteristics of gate dielectrics after different Fowler-Nordheim stress conditions are investigated. It is proved that none of the degradation mechanism known so far are capable of explaining the evolution of the bulk oxide degradation features after high field electrical stress. Instead, it is shown that the degradation process can be attributed to a universal charge build-up empirical law. Besides, a new and simple method for analyzing the so-called “turn-over” phenomenon in MOS structures is proposed. The method enables the monitoring of the whole Si band gap, at room temperature and without any assumption concerning the nature of the interface traps (donor-or acceptor-like). Finally, comparison between SiO 2 and nitridated oxides in N 2 O ambient is conducted in terms of volume/interface trapping properties.


Journal of Applied Physics | 1992

Oxide reliability criterion for the evaluation of the endurance performance of electrically erasable programmable read only memories

C. Papadas; G. Ghibaudo; G. Pananakakis; Carlo Riva; P. Mortini

The impact of the oxide reliability on the endurance performance of nonvolatile memories [electrically erasable read only memories (EEPROMs)] is analyzed quantitatively. The degradation rate of tunnel SiO2 layers as obtained from EEPROM cells as well as tunnel oxide capacitors subjected to different modes of electrical stress (write/erase operations, static and dynamic stress) are compared and attributed to a specific charge generation mechanism. Furthermore, a reliability criterion for the optimization of the tunnel oxide technology entering the fabrication of EEPROM cells is also proposed.


international conference on microelectronic test structures | 1990

Accelerated current test for fast tunnel oxide evaluation (of EPROMs)

Paolo Cappelletti; Paolo Ghezzi; Federico Pio; Carlo Riva

An accelerated method for wafer-level tunnel oxide evaluation and screening is proposed and compared to the widely used constant current test. The dielectric is stressed by an exponentially increasing current flow until breakdown occurs. In a short measurement time a wide current density range is explored, so that both latent defectivity and intrinsic oxide properties can be monitored. It is concluded that sensitivity in charge to breakdown determination and its good correlation with constant current stress results make the ramped current method suitable for routine use in both R&D and production.<<ETX>>


IEEE Electron Device Letters | 1992

Series resistance effects in thin oxide capacitor evaluation

F. Pio; L. Ravazzi; Carlo Riva

The effects of undesired series resistance in thin oxide capacitors are studied. Thin dielectric reliability is usually evaluated by means of accelerated tests (ramped or constant voltage or current stress). It is shown that the breakdown electric field can be highly overestimated due to the series resistance associated with the test structure: the larger the resistance, the bigger the error. Moreover, breakdown detection criteria in automatic test routines become more critical. It is also demonstrated that a nonuniform stress is applied to the dielectric whenever the series resistance is position-dependent, as it usually is. Erroneous breakdown-related defect distributions could be inferred as a consequence of neglecting the series resistance effect. It is therefore suggested that workers pay much attention to the test structure layout definition in order to minimize these problems.<<ETX>>


Solid-state Electronics | 1993

Numerical transient simulation of the programming window degradation in flotox eeprom cells

C. Papadas; G. Ghibaudo; G. Pananakakis; Carlo Riva

Abstract Numerical transient simulations of the programming window degradation in FLOTOX EEPROM cells are presented. Unlike analytical solutions, this numerical approach takes into account the actual waveform of the programming voltage. The programming window degradation can therefore be evaluated for realistic situations provided the degradation rate of the tunnel oxide is known. The simulation enables the endurance characteristics of the memory cells to be predicted for given programming conditions and tunnel oxide quality. Thereby, the optimization of the cell geometry with respect to the endurance performance as well as the selection of the optimum programming conditions which minimize the window degradation become possible, even prior to the fabrication of the memory cells.


Microelectronics Journal | 1993

Influence of series resistance in oxide parameter extraction from accelerated tests data

Federico Pio; L. Ravazzi; Carlo Riva

Abstract Accelerated reliability tests on thin oxide capacitors can be affected by series resistance effects at high stress conditions. The purpose of this work is to point out such problems, which concern both measurements and simulations. It is shown that breakdown electric field is overestimated. Due to the resulting non-uniform stress, charge density at breakdown is underestimated if the test structure layout is not accurately designed. In any case, the series resistance effects can have an undesirable impact on the reliability evaluation of thin dielectrics.


Microelectronics Journal | 1993

Thin oxide nitridation in N2O by RTP for non-volatile memories

N. Bellafiore; Federico Pio; Carlo Riva

Abstract 6–15 nm thick tunnel dielectrics obtained by rapid thermal processing are considered. The growth kinetics of silicon oxidation in O 2 and oxynitridation in N 2 O are reported. Chemical-physical analyses, performed by Auger electron spectrometry, show evidence of nitrogen piling up at the Si/dielectric interface on nitrided films. The potential barrier height is unchanged with respect to that of Si/SiO 2 . Electrical characterization of the thin layers was performed on polysilicon-gate N + area capacitors, measuring Fowler-Nordheim conduction, breakdown electric field ( E BD ), charge density at breakdown ( Q BD ) and charge trapping under accelerating stress conditions. Oxynitrided dielectrics exhibit an improvement in E BD , their Q BD is increased by a factor of about two with respect to control oxide, and less negative charge trapping is observed. The endurance of EEPROM (electrical erasable programmable read only memory) cells has also been measured for up to 10 7 cycles.


Microelectronics Journal | 1994

Thin SiO2 films nitrided in N2O

N. Bellafiore; Federico Pio; Carlo Riva

Abstract Thin oxide nitridation in N 2 O has been demonstrated to improve the dielectric characteristics in terms of charge to breakdown and trapping under current injection. In this work we compare the results obtained with the RTP and conventional oven nitridation technologies. Both reference oxide and nitrided oxide samples have been considered. Auger electron spectroscopy provided the nitrogen depth profiles. The electrical characterization has been performed by means of the constant current stress and exponential current ramp stress techniques, as well as high-frequency and quasi-static capacitance-voltage (C-V) measurements for interfacial state density determination as a function of the injected charge.


Semiconductor Science and Technology | 1991

A study of the oxide grown on WSi2

Paolo Ghezzi; Federico Pio; G Queirolo; Carlo Riva

Modern single-poly electrically erasable programmable read-only memories (EEPROM) use a stacked silicide/polysilicon (polycide) floating gate as a charge storage element. In these devices the ability to retain stored charge relies on the quality of the top silicon dioxide, thermally grown on the silicide, which is known to be affected by the oxidation procedure. The authors have studied silicon dioxide films, thermally grown in a dry oxygen atmosphere on WSi2, both in terms of composition and electrical properties. Concentration depth profiles were obtained by means of Auger electron spectroscopy (AES), while electrical characteristics were obtained on poly-Si/SiO2/WSi2 capacitors, from C-V plots, I-V measurements and ramped voltage stress. To characterize the oxide reliability, the endurance and memory retention at high temperature have been measured on single-poly EEPROM cells. The results show that the oxide thermally grown on tungsten silicide can meet the requirements for single-poly PROM device fabrication. The functionality of memory cells has been demonstrated, both with endurance and retention measurements.

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