Cathy A. Chancellor

Material dependence of hydrogen diffusion: implications for NBTI degradation

Negative bias temperature instability (NBTI) is known to exhibit significant recovery upon removal of the gate voltage. The process dependence of this recovery behavior is studied by using the time slope (n) as the monitor. We observe a systematic variation of n with oxide thickness, nitrogen concentration, and fluorine implantation. Incorporation of the material dependence of the diffusivity within the reaction-diffusion (R-D) framework captures the observed trends. The consequences of this modification are (a) diffusion limitation is shown to arise from diffusion in poly-Si, rather than oxide, (b) a plausible explanation for low-voltage stress induced leakage current (LV-SILC) naturally appears. Important findings are (a) NBTI degradation remains significant at high frequencies, (b) numerical simulations at moderate frequencies can be used to predict circuit impact in the GHz regime, (c) high frequency operation can be modeled as a lower effective DC stress

Product drift from NBTI: Guardbanding, circuit and statistical effects

Circuits employing advanced performance and power management techniques (clock gating, half-cycle paths) are found to be much more sensitive to NBTI primarily due to differential and asymmetric aging, with a 1% transistor drift leading to as much as 3% circuit drift in some cases. For the first time, we report a monotonic reduction in variance of the log parameters (Ln(ΔF/F) and Ln(ΔID/ID)) as a function of stress time. A stochastic guard banding model accounting for time-dependent variance, re-ordering effects and granularity of data is demonstrated.

The Traps that cause Breakdown in Deeply Scaled SiON Dielectrics

The paper shows that a minimum of two traps is required to cause breakdown in SiON films down to 10A. At least one trap must be an interface state and at least one must be a bulk state. At low voltages, the rate limiting step for breakdown is the generation of interface traps and is controlled by the release of H0

An extensive and improved circuit simulation methodology for NBTI recovery

A feasible computational framework that enables improved predictability of NBTI degradation within commercially available tools is discussed. The NBTI model is used for both delay correction in transistor characterization data and real-time circuit operation where recovery is present. The complementary nature of implementation is readily incorporated into existing model extraction and verification tools. The method provides significantly enhanced accuracy in simulations when compared to circuit data, yet retains practicality and flexibility.

The Current Understanding of the Trap Generation Mechanisms that Lead to the Power Law Model for Gate Dielectric Breakdown

This paper reviews recent experiments that have shown that the probable mechanism for low voltage trap generation and dielectric breakdown is anode hydrogen release. Vibrational excitation of silicon-hydrogen bonds is the process that provides the most plausible explanation for the existence of a power law model for TDDB.

The roles of hydrogen and holes in trap generation and breakdown in ultra-thin SiON dielectrics

We show for the first time that trap generation and breakdown in ultra thin SiON gate dielectrics are triggered by the release of two hydrogen species (H⁺ and H⁰) from the anode during TDDB stress

Impact of transistor reliability on RF oscillator phase noise degradation

The impact of deep sub-micron CMOS transistor reliability on RF oscillator phase noise degradation is demonstrated along with the importance of off-state drain stress for large signal RF applications. Process and device optimization was successful in reducing phase noise degradation to acceptable levels.

An analysis Of the benefits of NBTI recovery under circuit operating conditions

A simple but powerful and efficient NBTI recovery model is presented. Calibration is performed with a wide set of stress and recovery sequences measured under various voltages. The model provides easy-to-use tools for analytical representation of NBTI behavior as well as compatibility for sophisticated circuit reliability simulations. Regarding circuit operation and transistor characterization, the model implies higher permanent damage and thus, less recoverable NBTI degradation as the VDD is increased. Furthermore, the activity of the transistors inside a circuit becomes very critical to understand the impact of recovery. The duty cycle and frequency trends are not sufficient to judge for the amount of circuit-level aging. Even the circuit topology contributes to the final degradation, and therefore recovery should be analyzed within the context of the circuit applications.

nMOS Short Channel Device Characteristics After Soft Oxide Breakdown and Implications for Reliability Projections and Circuits

The currents in all N-channel field effect transistor device terminals can be severely degraded when a soft breakdown event occurs from gate-to-drain. These effects become more pronounced for shorter channel lengths. We present a methodology for separating the effects of mobility degradation and threshold voltage shift on post breakdown device characteristics. Using an accurate equivalent circuit model, we analyze the impact of these parameter shifts on post breakdown circuit performance and the implications for post breakdown reliability projections and circuit design.

Recovery modeling of negative bias temperature instability (NBTI) for SPICE-compatible circuit aging simulators

A feasible computational framework that enables improved predictability of NBTI degradation within commercially available tools is discussed. The NBTI model is used for real-time circuit operation where recovery is present. The complementary nature of implementation is readily incorporated into existing model extraction and verification tools. The method provides significantly enhanced accuracy in simulations when compared to circuit data, yet retains practicality and flexibility.