Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Chien-Chao Huang is active.

Publication


Featured researches published by Chien-Chao Huang.


international electron devices meeting | 2012

Molecular Dynamic simulation study of stress memorization in Si dislocations

Tzer-Min Shen; Yen-Tien Tung; Ya-Yun Cheng; Da-Chin Chiou; Chia-Yi Chen; Ching-Chang Wu; Yi-Ming Sheu; Han-Ting Tsai; Chien-Chao Huang; Gordon Hsieh; Gino Tsai; Samuel Fung; Jeff Wu; Carlos H. Diaz

Stress-Memorization-Technique by Si dislocations is effective in enhancing NFET device performance [1,2]. For the first time, MD (Molecular Dynamic) simulations are applied to explain the formation mechanism of dislocations during the Solid-Phase-Epitaxy-Regrowth (SPER) process. A semi- empirical TCAD method based on lattice-KMC (L-KMC) is then developed to predict dislocation formation. The simulated dislocation positions agree well with silicon experiments characterized by TEM. TCAD simulations show that the resulting dislocations are along the [111] direction and provide ~650MPa average longitudinal stress in channel regions, consistent with Nano-Beam-Diffraction (NBD) strain measurement. The channel stress is predicted by simulation to further increase by 1.5X after the poly-silicon gate removal step in a replacement-gate process. The dislocation SMT enhances NFET electron mobility by 25% and Ion-Ioff performance by 15%.


Archive | 2003

Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors

Yee-Chia Yeo; How-Yu Chen; Chien-Chao Huang; Wen-Chin Lee; Fu-Liang Yang; Chenming Hu


Archive | 2005

Strained channel on insulator device

Chung-Hu Ge; Chao-Hsiung Wang; Chien-Chao Huang; Wen-Chin Lee; Chenming Hu


Archive | 2002

Novel CMOS device

Chien-Chao Huang; Chao-Hsing Wang; Chung-Hu Ge; Chenming Hu


Archive | 2003

Method for dicing semiconductor wafers

Hsin-Hui Lee; Chien-Chao Huang; Chao-Hsiung Wang; Fu-Liang Yang; Chenming Hu


Archive | 2003

Strained silicon layer semiconductor product employing strained insulator layer

Chien-Chao Huang; Chao-Hsiung Wang; Chung-Hu Ge; Wen-Chin Lee; Chenming Hu


Archive | 2004

Complementary field-effect transistors and methods of manufacture

Chien-Chao Huang; Fu-Liang Yang; Mickey Ken; Chenming Hu; Chung-Hu Ge; Wen-Chin Lee; Chih-Hsin Ko


Archive | 2004

Method of fabricating a wafer with strained channel layers for increased electron and hole mobility for improving device performance

Chien-Chao Huang; Yee-Chia Yeo; Kuo-Nan Yang; Chun-Chieh Lin; Chenming Hu


Archive | 2003

Strained silicon MOS devices

Chien-Chao Huang; Chung-Hu Ge; Wen-Chin Lee; Chenming Hu; Carlos H. Diaz; Fu-Liang Yang


Archive | 2005

Relaxed silicon germanium substrate with low defect density

Chun Chich Lin; Yee-Chia Yeo; Chien-Chao Huang; Chao-Hsiung Wang; Tien-Chih Chang; Chenming Hu; Fu-Liang Yang; Shih-Chang Chen; Mong-Song Liang; Liang-Gi Yao

Collaboration


Dive into the Chien-Chao Huang's collaboration.

Researchain Logo
Decentralizing Knowledge