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Dive into the research topics where Chienfan Yu is active.

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Featured researches published by Chienfan Yu.


international electron devices meeting | 2001

High-performance symmetric-gate and CMOS-compatible V/sub t/ asymmetric-gate FinFET devices

J. Kedzierski; D.M. Fried; E.J. Nowak; T. Kanarsky; J.H. Rankin; H. Hanafi; Wesley C. Natzle; D. Boyd; Y. Zhang; R.A. Roy; J. Newbury; Chienfan Yu; Qingyun Yang; P. Saunders; C.P. Willets; A. Johnson; S.P. Cole; H.E. Young; N. Carpenter; D. Rakowski; B.A. Rainey; P.E. Cottrell; M. Ieong; H.-S.P. Wong

Double-gate FinFET devices with asymmetric and symmetric polysilicon gates have been fabricated. Symmetric gate devices show drain currents competitive with fully optimized bulk silicon technologies. Asymmetric-gate devices show |V/sub t/|/spl sim/0.1 V, with off-currents less than 100 nA/um at V/sub gs/=0.


Archive | 1992

Device and method for accurate etching and removal of thin film

Shwu-Jen Jeng; Wesley C. Natzle; Chienfan Yu


Archive | 1997

Trench sidewall patterned by vapor phase etching

Richard L. Kleinhenz; Wesley C. Natzle; Chienfan Yu


Archive | 2001

Gate linewidth tailoring and critical dimension control for sub-100 nm devices using plasma etching

Jeffrey J. Brown; Sadanand V. Deshpande; David V. Horak; Maheswaran Surendra; Len Y. Tsou; Qingyun Yang; Chienfan Yu; Y. Zhang


Archive | 1996

Oxide strip that improves planarity

David C. Ahlgren; Gary B. Bronner; Wesley C. Natzle; Erick G. Walton; Chienfan Yu


Archive | 1995

Sealed chamber with heating lamps provided within transparent tubes

Chienfan Yu; David E. Kotecki; Wesley C. Natzle


Archive | 1997

Oxide layer patterned by vapor phase etching

Richard L. Kleinhenz; Wesley C. Natzle; Chienfan Yu


Archive | 1997

Vapor phase etching of oxide masked by resist or masking material

Richard L. Kleinhenz; Wesley C. Natzle; Chienfan Yu


Archive | 2001

Vapor phase etch trim structure with top etch blocking layer

Frederick William Buehrer; Derek Chen; William Chu; Scott W. Crowder; Sadanand V. Deshpande; David V. Horak; Wesley C. Natzle; Hung Y. Ng; Len Y. Tsou; Chienfan Yu


Archive | 1998

Method of patterning sidewalls of a trench in integrated circuit manufacturing

Richard L. Kleinhenz; Wesley C. Natzle; Chienfan Yu

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