Chin Hsia

High-Efficiency Envelope-Tracking W-CDMA Base-Station Amplifier Using GaN HFETs

A high-efficiency wideband code-division multiple-access (W-CDMA) base-station amplifier is presented using high-performance GaN heterostructure field-effect transistors to achieve high gain and efficiency with good linearity. For high efficiency, class J/E operation was employed, which can attain up to 80% efficiency over a wide range of input powers and power supply voltages. For nonconstant envelope input, the average efficiency is further increased by employing the envelope-tracking architecture using a wide-bandwidth high-efficiency envelope amplifier. The linearity of overall system is enhanced by digital pre-distortion. The measured average power-added efficiency of the amplifier is as high as 50.7% for a W-CDMA modulated signal with peak-to-average power ratio of 7.67 dB at an average output power of 37.2 W and gain of 10.0 dB. We believe that this corresponds to the best efficiency performance among reported base-station power amplifiers for W-CDMA. The measured error vector magnitude is as low as 1.74% with adjacent channel leakage ratio of -51.0 dBc at an offset frequency of 5 MHz

Digital Predistortion for Envelope-Tracking Power Amplifiers Using Decomposed Piecewise Volterra Series

Due to dynamic changes of supply voltage, envelope-tracking (ET) power amplifiers (PAs) exhibit very distinct characteristics in different power regions. It is very difficult to compensate the distortion induced by these amplifiers by employing conventional digital predistortion techniques. In this paper, by introducing a new piecewise Volterra model based on a vector threshold decomposition technique, we first set several thresholds in the input power level according to the PA characteristics, and decompose the input complex envelope signal into several sub-signals by using these thresholds. We then process each sub-signal separately by employing the dynamic deviation reduction-based Volterra series, and finally recombine them together to produce the predistorted output. Experimental results show that by using this new decomposed piecewise digital predistorter model, the distinct characteristics of the ET system at different signal power levels can be accurately modeled, and thus, the distortion, including both static nonlinearities and memory effects, caused by the amplifier nonlinear behavior can be effectively compensated.

Wideband Envelope Tracking Power Amplifiers With Reduced Bandwidth Power Supply Waveforms and Adaptive Digital Predistortion Techniques

This paper presents a new technique to reduce the bandwidth of the dynamic power supply waveform used in wideband envelope tracking power amplifiers (PAs). When the envelope tracking technique is applied to broadband signals such as WCDMA and 3GPP LTE, the wide bandwidth of the envelope signal makes it difficult to implement the dynamic supply modulator efficiently and accurately. We show here a technique to reduce the bandwidth of the power supply waveform, thereby allowing better efficiency for the supply modulator; and a linearization method for correcting the nonlinearity caused by the bandwidth reduction. The feasibility of this technique is demonstrated for a single carrier WCDMA signal with a 7.6-dB peak-to-average power ratio using a GaAs high-voltage HBT PA. The bandwidth of the power supply waveform is reduced from 20 to 4 MHz. After linearization, the reduced bandwidth envelope tracking PA exhibits an average output power of 28 W, an average gain of 12 dB and an overall power-added efficiency of 49%. The measured normalized rms error is as low as 0.67% with an adjacent channel leakage ratio of -53.9 and -54.2 dBc at offset frequencies of 5 and 10 MHz, respectively.

High Efficiency Envelope Tracking LDMOS Power Amplifier for W-CDMA

A high performance W-CDMA base station power amplifier is presented, which uses an envelope tracking bias system along with an advanced 0.4mum gate length LDMOS transistor, to achieve high efficiency. High linearity is also achieved by employing digital predistortion. For a target WCDMA envelope with a peak-to-average power ratio of 7.6 dB, the measured overall power-added efficiency (PAE) is as high as 40.4 %. Within this system, the RF power amplifier has an average drain efficiency of approximately 64%, and the envelope amplifier has about 60% efficiency. After the memoryless digital predistortion the normalized power RMS error is 3.3%, at an average output power of 27 W and gain of 14.9 dB. After memory mitigation the normalized power RMS error drops to below 1.0%. The efficiency ranks among the highest reported for a single stage LDMOS W-CDMA base station amplifier

Digitally Assisted Dual-Switch High-Efficiency Envelope Amplifier for Envelope-Tracking Base-Station Power Amplifiers

This paper presents a novel digitally assisted dual-switch envelope amplifier used for wideband high-efficiency envelope-tracking (ET) base-station power amplifiers (PAs). The proposed envelope amplifier comprises two switching buck converters to provide the high-power ET signal to the RF stage and a wideband linear stage to maintain the envelope signal accuracy. The control technique utilizes digital signal processing in conjunction with analog hysteretic feedback to separately control two high-efficiency switchers and thus successfully reduces power consumption of the linear stage, especially for applications requiring high peak-to-average ratio (PAPR) signals. The overall ET system was demonstrated using GaAs high-voltage HBT PAs. For a variety of signals ranging from 6.6- to 9.6-dB PAPR and up to 10-MHz RF bandwidth, the overall system power-added efficiency reached 50%-60%, with a normalized root-mean-square error below 1% and the first adjacent channel leakage power ratio of -55 dBc after digital predistortion with memory mitigation, at an average output power above 20 W and 10-dB gain.

Modeling and Design of RF Amplifiers for Envelope Tracking WCDMA Base-Station Applications

Wideband code division multiple access (WCDMA) base-station RF amplifiers using a variety of device technologies including GaN field-effect transistors (FETs), Si LDMOS, and GaAs high-voltage heterojunction bipolar transistors (HVHBTs) are modeled, optimized, and compared for use in wideband envelope tracking (ET) system. A quasi-static approach is employed to effectively model the supply-modulated RF amplifiers, and thus facilitate the design optimization process. A new design methodology for ET RF amplifiers is introduced including identification of optimum fundamental and harmonic terminations. The fundamental and harmonic impedances have been successfully optimized for various RF devices and good agreement has been achieved between the simulation and measurement results. Among the modeled and measured ET RF amplifiers, a GaAs HVHBT exhibits the best overall efficiency of 60% with an average output power of 33 W and a gain of 10 dB for a WCDMA signal with 3.84-MHz bandwidth and 7.7-dB peak-to-average power ratio, while meeting all linearity requirements of the WCDMA standard. Desirable device characteristics for optimum ET operation are also discussed.

Wideband envelope tracking power amplifier with reduced bandwidth power supply waveform

This paper presents a new technique to reduce the bandwidth of the dynamic power supply waveform for use in wideband envelope tracking power amplifiers (PAs). When the envelope tracking technique is applied to the broadband signals such as WiMAX and LTE, the wide bandwidth of the envelope signal makes it difficult to implement the dynamic power supply efficiently and accurately. We show here for the first time a technique to reduce the bandwidth of the dynamic power supply voltage, thereby allowing better efficiency for the dynamic power supply; and a linearization method for correcting the nonlinearity caused by the bandwidth reduction. The feasibility of this technique is demonstrated for a single carrier WCDMA signal with 7.8-dB PAPR using a GaAs HVHBT PA. The bandwidth of the power supply signal is reduced from 20 MHz to 5 MHz. After linearization, the reduced bandwidth envelope tracking PA exhibits an average output power of 25 W, an average gain of 13 dB and an overall power-added efficiency of 50%. The measured normalized RMS error is as low as 3.98% with an adjacent channel leakage ratio of −41 dBc and −48 dBc at offset frequencies of 5 MHz and 10 MHz, respectively.

High Efficiency WCDMA Envelope Tracking Base-Station Amplifier Implemented with GaAs HVHBTs

A record high-performance GaAs high-voltage HBT (HVHBT)-based WCDMA base-station power amplifier is presented, which uses an envelope tracking bias system to achieve high efficiency and linearity. A wideband envelope amplifier provides dynamic collector supply biasing to the RF stage. A digital pre-distortion technique is employed to satisfy the linearity specifications of WCDMA. The measured overall power-added efficiency reached 58% with a normalized root-mean-square (RMS) error of 2.9% and an adjacent channel leakage ratio (ACLR) of -49 dBc at 5-MHz offset at an average output power of 42 W and a gain of 10.3 dB for a single carrier WCDMA signal with 6.6-dB peak-to-average power ratio. A memory mitigation algorithm further improves the linearity, resulting in an ACLR of -70 dBc and a normalized RMS error of 0.3%. Measurements were made to quantify separately the efficiency contributions of the HVHBT-based RF stage, and of the envelope amplifier. The measurements show that the RF stage operates at collector efficiency above 85% over most of the instantaneous power range of the WCDMA signal. This remarkably high efficiency is the result of low ldquoon-resistancerdquo and low (and nearly voltage independent) output capacitance of the HVHBT.

Wideband high efficiency digitally-assisted envelope amplifier with dual switching stages for radio base-station envelope tracking power amplifiers

This paper presents a novel envelope amplifier architecture to improve the overall efficiency of wideband high linearity envelope tracking power amplifiers (PAs). We show here a technique to increase the efficiency of the envelope amplifier while maintaining the amplifiers bandwidth. The technique utilizes digital signal processing (DSP) control in conjunction with analog hysteretic feedback. Two high efficiency buck switching stages are coordinated to provide the wideband envelope power to the RF stage; a wide bandwidth linear regulator is also used at low power to maintain the envelope signal accuracy. The technique improves the efficiency of the envelope amplifier, especially for applications requiring high peak-to-average power ratio (PAPR) with wide bandwidth signals. The overall system was demonstrated using a GaAs high voltage HBT PA. For a variety of signals ranging from 6.6dB to 9.6dB PAR and up to 10MHz bandwidth, the overall system PAE reached above 50%, with a normalized power RMS error below 5% and ACLR1 of −50dBc with memory-less digital predistortion, at an average output power above 19W and gain of 10dB. The efficiencies obtained are the best ever reported, to our knowledge, for envelope tracking base station amplifiers for these signals.

High efficiency envelope tracking power amplifier with very low quiescent power for 20 MHz LTE

A high efficiency wideband envelope tracking power amplifier with low quiescent power is presented. The CMOS envelope amplifier has a combined linear amplifier and switching amplifier to achieve high efficiency and wider bandwidth. Quiescent power of the envelope amplifier is reduced using a source cross-coupled linear amplifier with inherently low DC power dissipation. Measurements show a power added efficiency of 45% for the envelope tracking power amplifier for 20 MHz LTE signal with 6.0 dB PAPR at 2.5 GHz at 1W output power.