Chris Bevis

REBL: design progress toward 16 nm half-pitch maskless projection electron beam lithography

REBL (Reflective Electron Beam Lithography) is a novel concept for high speed maskless projection electron beam lithography. Originally targeting 45 nm HP (half pitch) under a DARPA funded contract, we are now working on optimizing the optics and architecture for the commercial silicon integrated circuit fabrication market at the equivalent of 16 nm HP. The shift to smaller features requires innovation in most major subsystems of the tool, including optics, stage, and metrology. We also require better simulation and understanding of the exposure process. In order to meet blur requirements for 16 nm lithography, we are both shrinking the pixel size and reducing the beam current. Throughput will be maintained by increasing the number of columns as well as other design optimizations. In consequence, the maximum stage speed required to meet wafer throughput targets at 16 nm will be much less than originally planned for at 45 nm. As a result, we are changing the stage architecture from a rotary design to a linear design that can still meet the throughput requirements but with more conventional technology that entails less technical risk. The linear concept also allows for simplifications in the datapath, primarily from being able to reuse pattern data across dies and columns. Finally, we are now able to demonstrate working dynamic pattern generator (DPG) chips, CMOS chips with microfabricated lenslets on top to prevent crosstalk between pixels.

REBL nanowriter: Reflective Electron Beam Lithography

REBL (Reflective Electron Beam Lithography) is being developed for high throughput electron beam direct write maskless lithography. The system is specifically targeting 5 to 7 wafer levels per hour throughput on average at the 45 nm node, with extendibility to the 32 nm node and beyond. REBL incorporates a number of novel technologies to generate and expose lithographic patterns at estimated throughputs considerably higher than electron beam lithography has been able to achieve as yet. A patented reflective electron optic concept enables the unique approach utilized for the Digital Pattern Generator (DPG). The DPG is a CMOS ASIC chip with an array of small, independently controllable cells or pixels, which act as an array of electron mirrors. In this way, the system is capable of generating the pattern to be written using massively parallel exposure by ~1 million beams at extremely high data rates (~ 1Tbps). A rotary stage concept using a rotating platen carrying multiple wafers optimizes the writing strategy of the DPG to achieve the capability of high throughput for sparse pattern wafer levels. The exposure method utilized by the DPG was emulated on a Vistec VB-6 in order to validate the gray level exposure method used in REBL. Results of these exposure tests are discussed.

REBL: A novel approach to high speed maskless electron beam direct write lithography

The system concepts used in a novel approach for a high throughput maskless lithography system called reflective electron beam lithography (REBL) are described. The system is specifically targeting five to seven wafer levels per hour throughput on average at the 45nm node, with extendibility to the 32nm node and beyond. REBL incorporates a number of novel technologies to generate and expose lithographic patterns at estimated throughputs considerably higher than electron beam lithography has been able to achieve as yet. A patented reflective electron optic concept enables the unique approach utilized for the digital pattern generator (DPG). The DPG is a complementary metal oxide semiconductor application specific integrated circuit chip with an array of small, independently controllable metallic cells or pixels, which act as an array of electron mirrors. In this way, the system is capable of generating the pattern to be written using massively parallel exposure by ∼1×106 beams at extremely high data rates ...

Reflective electron-beam lithography: progress toward high-throughput production capability

Maskless electron beam lithography can potentially extend semiconductor manufacturing to the 16 nm technology node and beyond. KLA-Tencor is developing Reflective Electron Beam Lithography (REBL) targeting high-volume 16 nm half pitch (HP) production. This paper reviews progress in the development of the REBL system towards its goal of 100 wph throughput for High Volume Manufacturing (HVM) at the 2X and 1X nm nodes. We will demonstrate the ability to print TSMC test patterns with the integrated system in photoresist on silicon wafers at 45 nm resolution. Additionally, we present simulation and experimental results that demonstrate that the system meets performance targets for a typical foundry product mix. Previously, KLA-Tencor reported on the development of a REBL tool for maskless lithography at and below the 16 nm HP technology node1. Since that time, the REBL team and its partners (TSMC, IMEC) have made good progress towards developing the REBL system and Digital Pattern Generator (DPG) for direct write lithography. Traditionally, e-beam direct write lithography has been too slow for most lithography applications. E-beam direct write lithography has been used for mask writing rather than wafer processing since the maximum blur requirements limit column beam current - which drives e-beam throughput. To print small features and a fine pitch with an e-beam tool requires a sacrifice in processing time unless one significantly increases the total number of beams on a single writing tool. Because of the continued uncertainty with regards to the optical lithography roadmap beyond the 16 nm HP technology node, the semiconductor equipment industry is in the process of designing and testing e-beam lithography tools with the potential for HVM.

Reflective electron beam lithography: A maskless ebeam direct write lithography approach using the reflective electron beam lithography concept

Reflective electron beam litography (REBL) utilizes several novel technologies to generate and expose lithographic patterns at throughputs that could make ebeam maskless lithography feasible for high volume manufacturing. The REBL program was described in a previous article [P. Petric et al., J. Vac. Sci. Technol. B 27, 161 (2009)] 2 years ago. This article will review the system architecture and the progress of REBL in the past 2 years. The main technologies making REBL unique are the reflective electron optics, the rotary stage, and the dynamic pattern generator (DPG). Changes in how these concepts have been implemented in a new design will be discussed. The main disadvantage of today’s electron beam direct write is low throughput; it takes many tens of hours to expose a 300 mm wafer today using ebeam lithography. The projected system throughput performance with the integrated technology of the reflective optics, DPG, and a multiple wafer rotary stage will be shown incorporating the performance data for the new column design.Reflective electron beam litography (REBL) utilizes several novel technologies to generate and expose lithographic patterns at throughputs that could make ebeam maskless lithography feasible for high volume manufacturing. The REBL program was described in a previous article [P. Petric et al., J. Vac. Sci. Technol. B 27, 161 (2009)] 2 years ago. This article will review the system architecture and the progress of REBL in the past 2 years. The main technologies making REBL unique are the reflective electron optics, the rotary stage, and the dynamic pattern generator (DPG). Changes in how these concepts have been implemented in a new design will be discussed. The main disadvantage of today’s electron beam direct write is low throughput; it takes many tens of hours to expose a 300 mm wafer today using ebeam lithography. The projected system throughput performance with the integrated technology of the reflective optics, DPG, and a multiple wafer rotary stage will be shown incorporating the performance data for...

Reflective electron beam lithography: lithography results using CMOS controlled digital pattern generator chip

Maskless electron beam lithography can potentially extend semiconductor manufacturing to the 10 nm logic (16 nm half pitch) technology node and beyond. KLA-Tencor is developing Reflective Electron Beam Lithography (REBL) technology targeting high-volume 10 nm logic node performance. REBL uses a novel multi-column wafer writing system combined with an advanced stage architecture to enable the throughput and resolution required for a NGL system. Using a CMOS Digital Pattern Generator (DPG) chip with over one million microlenses, the system is capable of maskless printing of arbitrary patterns with pixel redundancy and pixel-by-pixel grayscaling at the wafer. Electrons are generated in a flood beam via a thermionic cathode at 50-100 keV and decelerated to illuminate the DPG chip. The DPG-modulated electron beam is then reaccelerated and demagnified 80-100x onto the wafer to be printed. Previously, KLA-Tencor reported on the development progress of the REBL tool for maskless lithography at and below the 10 nm logic technology node. Since that time, the REBL team has made good progress towards developing the REBL system and DPG for direct write lithography. REBL has been successful in manufacturing a CMOS controlled DPG chip with a stable charge drain coating and with all segments functioning. This DPG chip consists of an array of over one million electrostatic lenslets that can be switched on or off via CMOS voltages to pattern the flood electron beam. Testing has proven the validity of the design with regards to lenslet performance, contrast, lifetime, and pattern scrolling. This chip has been used in the REBL demonstration platform system for lithography on a moving stage in both PMMA and chemically amplified resist. Direct imaging of the aerial image has also been performed by magnifying the pattern at the wafer plane via a mag stack onto a YAG imaging screen. This paper will discuss the chip design improvements and new charge drain coating that have resulted in a functional DPG chip and will evaluate the current chip performance on the REBL system. Print results for line/space and device test patterns at the 100nm node will be presented.

New advances with REBL for maskless high-throughput EBDW lithography

REBL (Reflective Electron Beam Lithography) is a program for the development of a novel approach for highthroughput maskless lithography. The program at KLA-Tencor is funded under the DARPA Maskless Nanowriter Program. A DPG (digital pattern generator) chip containing over 1 million reflective pixels that can be individually turned on or off is used to project an electron beam pattern onto the wafer. The DARPA program is targeting 5 to 7 wafers per hour at the 45 nm node, and this paper will describe improvements to both increase the throughput as well as extend the system to the 2x nm node and beyond. This paper focuses on three specific areas of REBL technology. First, a new column design has been developed based on a Wien filter to separate the illumination and projection beams. The new column design is much smaller, and has better performance both in resolution and throughput than the first column which used a magnetic prism for separation. This new column design is the first step leading to a multiple column system. Second, the rotary stage latest results of a fully integrated DPG CMOS chip with lenslets will be reviewed. An array of over 1 million micro lenses which is fabricated on top of the CMOS DPG chip has been developed. The microlens array eliminates crosstalk between adjacent pixels, maximizes contrast between on and off states, and provides matching of the NA between the DPG reflector and the projection optics.

Preliminary investigation of shot noise, dose, and focus latitude for e-beam direct write

Maskless electron beam lithography can potentially extend semiconductor manufacturing to the 10 nm logic (16 nm half pitch) technology node and beyond. KLA-Tencor is developing Reflective Electron Beam Lithography (REBL) technology targeting high-volume 10 nm logic performance. There are several potential applications for E-Beam Direct Write Lithography in high volume manufacturing (HVM) Lithography. They range from writing full critical layers to the use as complementary lithography in order to write cut masks for multiple patterning optical lithography. Two of the potential applications for REBL with specific requirements on the writing strategy are contact layer and cut mask lithography. For these two applications the number of electrons writing a single feature can be a concern if the resist sensitivity is high and the process latitude is small. This paper will share calculations with respect to the needed and expected shot noise, dose and focus latitude performance of a proposed REBL lithography system. The simulated results will be compared to data taken on test structures. Predicted performance based on the simulations and test results of a potential REBL system for contact layers and cut mask applications will be discussed.

Electron bombardment of films used for reducing spurious charge in electrostatic electron optics

In electrostatic electron optics charging on the surfaces of insulators separating the electrodes can cause undesired beam fluctuation. In prior work, the authors showed that coating the insulators with a film deposited by atomic layer deposition (ALD) could lead to acceptably low charging effects in the reflection electron beam lithography system. However, the stability of the resistivity can also be affected by contaminants present in the vacuum environment of the electron beam tool. The mechanism of formation for carbon layers typically involves the cracking of hydrocarbon contaminants adsorbed on the film surface by photon, electrons, or heat. This work describes changes in resistivity of ALD films of zinc–zirconium oxide and tantalum–niobium oxide 40 nm thick under different operating conditions. In a vacuum system utilizing an oil rough pump and a turbo pump, <0.01 C/cm2 bombardment with 309 V electrons results in about 1 order of magnitude reduction in surface resistance. This effect was not observ...

Photoreflectance Spectroscopic Characterization of Si with SiO2 and HfO2 Dielectric Layers

Photoreflectance (PR) spectroscopy is employed as a non‐destructive and contactless technique for the characterization of silicon with SiO2 and HfO2 dielectric layers. The position of PR spectra reveals the critical point energy and the magnitude indicates the surface potential in silicon. By fitting PR spectra to a third‐derivative functional form, we find the critical point of silicon with a 1.0 nm SiO2 layer is 3.42 eV. The PR magnitude of samples with HfO2 dielectric layer decreases with layer thickness. This indicates the decreasing of surface potential with high‐κ layer thickness, possibly due to increased charge defects in the layer.