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Dive into the research topics where Chris E. Barns is active.

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Featured researches published by Chris E. Barns.


international electron devices meeting | 2006

Floating Body Cell with Independently-Controlled Double Gates for High Density Memory

Ibrahim Ban; Uygar E. Avci; Uday Shah; Chris E. Barns; David L. Kencke; Peter L. D. Chang

An aggressively scaled, self-aligned, independently controlled double-gate floating body cell (IDG FBC) is reported. This structure eases the scaling constraints of other FBC memory devices proposed to date. Enhanced memory performance has been demonstrated owing to the independent back gate with thin oxide and thin Si fin. Memory devices with 85-nm Lg and 30-nm fin widths (Z) have been shown to exhibit better memory characteristics at a lower voltage than alternative FBC structures at comparable dimensions. Design, fabrication, operation, and scalability of IDG FBC devices are discussed


Electrochemical and Solid State Letters | 2005

Viewing asperity behavior under the wafer during CMP

Caprice Gray; Daniel Apone; Chris Rogers; Vincent P. Manno; Chris E. Barns; Mansour Moinpour; Sriram Anjur; Ara Philipossian

RO O F CO PY 0205ESL Viewing Asperity Behavior Under the Wafer during CMP Caprice Gray, Daniel Apone, Chris Rogers, Vincent P. Manno, Chris Barns, Mansour Moinpour, Sriram Anjur, and Ara Philipossian* Department of Mechanical Engineering, Tufts University, Medford, Massachusetts 02155, USA Intel Corporation, Hillsboro, Oregon 97124, USA Cabot Microelectronics, Aurora, Illinois 60504, USA Deptartment of Chemical and Environmental Engineering, The University of Arizona, Tucson, Arizona 85721, USA


World Tribology Congress III, Volume 2 | 2005

QUANTITATIVE IN-SITU MEASUREMENT OF ASPERITY COMPRESSION DURING CHEMICAL MECHANICAL PLANARIZATION

Caprice Gray; Daniel Apone; Chris Rogers; Vincent P. Manno; Chris E. Barns; Mansour Moinpour; Sriram Anjur; Ara Philipossian

Modifications to the Dual Emission Laser Induced Fluorescence (DELIF) procedure used to collect images of the slurry layer between the polishing pad and wafer during Chemical Mechanical Planarization (CMP) have provided a means to attain instantaneous, high spatial resolution images of slurry film thickness. Presented here is a technique to determine the calibration factor that correlates image intensity to slurry film thickness. This presentation will discuss how to determine slurry layer shape near wafer features, pad roughness, and pad compressibility.Copyright


MRS Proceedings | 2004

In-Situ Friction and Pad Topography Measurements During CMP

Caprice Gray; Daniel Apone; Chris E. Barns; Moinpour Monsour; Sriram Anjur; Vincent P. Manno; Chris Rogers

Duel Emission Laser Induced Fluorescence (DELIF) and friction measurements are taken in-situ during CMP to observe slurry flow beneath a model of an integrated circuit (IC) wafer. Friction measurements average around 7.5 lb and multiple frequencies are observed. Slurry film thicknesses on the order of a 10±3μm were observed during CMP of a flat wafer. The film thickness seems uncorrelated to friction measurements except when the pad and wafer rotation speeds are significantly slowed. DELIF has also accurately measured a 9μm etched step, with noise in the image equal to ±3 μm.


Archive | 2004

Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrode

Justin K. Brask; Jack T. Kavalieros; Mark L. Doczy; Uday Shah; Chris E. Barns; Matthew V. Metz; Suman Datta; Annalisa Cappellani; Robert S. Chau


Archive | 2005

Complementary metal oxide semiconductor integrated circuit using raised source drain and replacement metal gate

Jack T. Kavalieros; Annalisa Cappellani; Justin K. Brask; Mark L. Doczy; Matthew V. Metz; Suman Datta; Chris E. Barns; Robert S. Chau


Archive | 2004

Replacement gate process for making a semiconductor device that includes a metal gate electrode

Uday Shah; Chris E. Barns; Mark L. Doczy; Justin K. Brask; Jack T. Kavalieros; Matthew V. Metz; Robert S. Chau


Archive | 2004

Multilayer metal gate electrode

Mark L. Doczy; Justin K. Brask; Jack T. Kavalieros; Chris E. Barns; Matthew V. Metz; Suman Datta; Robert S. Chau


Archive | 2003

Replacement gate flow facilitating high yield and incorporation of etch stop layers and/or stressed films

Robert S. Chau; Justin K. Brask; Chris E. Barns; Scott Hareland


Archive | 2004

Integrating n-type and p-type metal gate transistors

Mark L. Doczy; Justin K. Brask; Steven J. Keating; Chris E. Barns; Brian S. Doyle; Michael L. McSwiney; Jack T. Kavalieros; John Barnak

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Suman Datta

University of Notre Dame

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