Chris McGuirk

Electrodeposition of copper–tin alloy thin films for microelectronic applications

The continuing shrink in device size has generated great interest to create interconnects with low resistivity and superior resistance to electromigration (EM) and stress migration (SM) in comparison to the existing Al or Al-alloy interconnections. Copper has become the metal of choice to meet the needs of present and future generation devices. In order to improve the intrinsic resistance of copper to EM/SM induced failure, alloying elements can be added into copper metallurgy. In the present investigation, we discuss a method to co-deposit an alloy of copper and tin in sub-microscopic features with high aspect ratio using a sulfate bath. It is observed that a small amount tin begins to co-deposit at potentials smaller than the equilibrium reduction potential. Under activation control regime, the composition is not affected by current density. The results of this study conclude that substantial tin deposition occurs upon onset of mass-transport limitation. It is found that a finite amount of time is required before electrolysis is controlled by mass-transfer. The transition time and hence, the composition of the plated film is affected by the hydrodynamic conditions, current density, and electrolyte composition. These factors must be taken into account in order to control the composition profile of tin in vias and trenches.

Influence of plating parameters on reliability of copper metallization

This work investigates the impact of plating parameters on the physical and electrical properties of plated copper films. Process parameters such as the plating current density and wafer rotation speed are known to affect the grain size and the residual stress in plated Cu films. We correlate the process parameters with trapped contamination in the films, which in turn influences the pre/post-anneal grain size and the relaxation of the residual stress. Preliminary reliability measurements show that the longevity of the interconnect structure is dependent on the intrinsic properties of the plated copper.

Characterization of electroless copper as a seed layer for sub-0.1 /spl mu/m interconnects

Complete gapfill of 0.1 /spl mu/m features with electroless Cu seed layers and electroplated Cu was demonstrated. Electrical tests on test structures indicated similar line and via chain resistance, yield and line-to-line leakage current on wafers with electroless Cu seed and PVD Cu seed layers filled with electroplated Cu.