Christoph Tzschoppe

A low-power SiGe BiCMOS 190 GHz receiver with 47 dB conversion gain and 11 dB noise figure for ultra-large-bandwidth applications

This paper presents a 190-GHz direct-conversion receiver capable of supporting higher-order modulation schemes and implemented in a SiGe BiCMOS technology. The circuit consists of a low-noise amplifier, an active fundamental mixer, a LO driver, a variable-gain baseband amplifier and a totem-pole output stage. To exploit the advantages of sub-THz frequencies in terms of available bandwidth at a low DC power consumption, all circuit blocks are concurrently optimized for large bandwidth and high power-efficiency. While consuming only 122 mW of DC power, the fabricated circuit exhibits a record 3-dB RF bandwidth of 35 GHz, a maximum conversion gain of 47 dB, a maximum baseband voltage swing of more than 800 mVpp and a minimum double-sideband noise figure of 10.7 dB.

A 2.4 GHz fast settling wake-up receiver frontend

This paper proposes the design of an integrated fast settling analog frontend for application in wireless wake-up receivers. The chip includes a low noise amplifier with matching transformer and integrated balun, a multi-hyperbolic tangent gilbert cell mixer with Sallen-Key filter, a limiting amplifier and a LC-cross coupled digital-controlled oscillator. The chain exhibits a measured conversion gain of 29 dB while only consuming an overall current of 3.3mA in its on-mode from a 2.5V supply. The measured input return loss is -19 dB at 2.4 GHz with a corresponding double sideband noise figure of 7.6 dB at an intermediate frequency of 51 MHz. The measured input referred 1 dB-compression point is at -44 dBm. All circuits enable on/off switching which allows operation within on-times of 200 ns. The component chain is optimized to settle in less than 60 ns until the output obtains -1 dB of its steady state amplitude. The proposed chip is fabricated in IHP 130 nm-SiGe-BiCMOS process.

Theory and design of advanced CMOS current mirrors

In this paper continuous time high-performance current mirrors (CMs) based on series and parallel connected unity sized CMOS transistors suitable for low power applications are presented. It is shown that the proposed implementation techniques allow an increased output resistance, from twice the output resistance of the simple current mirror (SCM) up to more than 50 times of the cascode current mirrors output resistance depending on the chosen topology. A complete theory which describes the concept of using series connected transistors is developed and expressed with analytical equations. Furthermore, it is shown that the advanced current mirror (ACM) and the advanced cascode current mirror (ACCM) exhibit a much higher output resistance compared to the simple and the cascode current mirror (CCM). Spectre simulations of the different current mirror implementations built with transistors of IHP 130nm CMOS technology verify the analytical solutions.

Cool silicon ICT energy efficiency enhancements

In this paper, we give an overview of some recent results achieved in the German cluster project Cool Silicon located around Dresden. Cool Silicon features around 50 projects and 100 partners from industry and research institutions, and aims at significantly increasing the efficiency in information and communications technology (ICT). Innovations in micro- and nanoelectronics, circuits, systems, sensors, software and regenerative supply technologies are tackled.

A 60MHz OTA-based IF filter for wireless wake-up receivers with 115 ns settling time

This paper presents the design and characterization of a fully-differential intermediate frequency (IF) filter based on an operational transconductance amplifier (OTA) with 6th order Butterworth bandpass characteristic. The designed 2-stage BiCMOS OTA can be treated as an operational amplifier (OPAmp) together with its output resistance. The combination exhibits an open-loop voltage gain of 75 dB and high gain-bandwidth product (GBP) of 5.8 GHz, while stability is achieved with a worst case phase margin (PM) of 54° from a low bias-current of only 520 μA. The multiple-feedback filter (MFB) elements for the target Butterworth frequency response are determined with circuit analysis based on an ideal OTA transfer function. The filter center frequency is set to 60 MHz, whereby a measured -3 dB-bandwidth of 15.5MHz is achieved. To enable the operation within an on-time of 200 ns the filter is able to settle at ±1 dB of its steady state amplitude in less than 115 ns. The filter was fabricated in the IHP 130nm BiCMOS technology and requires a current of only 1.6mA from a 2.5V-supply including all bias circuits.

Layout considerations in power amplifiers with negative parallel feedback

In this paper, we discuss layout problems encountered in power amplifiers with negative parallel feedback. We show how to reduce the risk of an unstable power amplifier (PA) by careful layouting without the use of additional elements and thus chip area. Optimised vs. non-optimised layouting are compared and verified with fabricated ICs. Finally a PA with large signal bandwidth of 1.9 GHz at a design frequency of 2.6 GHz using negative feedback in a standard 250 nm BiCMOS technology is introduced. An efficiency of 34% and an output power of 26.9dBm at the 1 dB compression point were measured.

Low power high gain bandwidth opamp in low cost 180 nm Bulk CMOS technology

This work presents a fully differential operational amplifier (opamp) design architecture, that achieves a high gain bandwidth at a low power consumption. For verification, the architecture is implemented in a low cost 180 nm bulk CMOS technology. The chip achieves a high gain bandwidth of 2.03 GHz at 55° phase margin with a low power consumption of only 2.25 mW. Of course even better results are possible if more sophisticated technologies like BiCMOS or massively scaled technologies are available. The opamp is used in analog baseband filters of communication systems and enables real time ability.

A fully integrated Doherty-amplifier for 5.6 GHz WLAN applications

In this paper, a fully integrated Doherty power amplifier (DPA) for application in IEEE 802.11a wireless local area network (WLAN) transmitters is proposed. The DPA exhibits an output power at its 1 dB compression point of 22 dBm with a corresponding power added efficieny (PAE) of 25 %. Within a 6dB-backoff the PAE is still 20 %, which among the highest reported for Doherty amplifiers fully integrated in silicon. The input reflection coefficient is less than -15 dB while the maximum forward transmission is 12.5 dB. This Doherty amplifier shows a low phase variation of only 16° over an input dynamic range of 30 dB. To verify the performance the DPA is measured with an orthogonal frequency divison multiplexed (OFDM) signal with 52 carriers using 16 QAM modulation scheme and a carrier frequency of 5.6 GHz. Error vector magnitudes are measured for different input power levels. The circuit is implemented in IHP 250nm-SiGe-BiCMOS technology and needs a 2.5 V supply. The chip area is 1.54 mm2 × 0.85 mm2 including the pads and eleven integrated inductors.

Low power fast Ethernet line driver

A low power Fast Ethernet line driver has been designed in a 180 nm CMOS technology from XFAB. A very low power consumption is achieved with class-B operation. Due to incorporating digital-to-analog conversion to the line driver itself, the power consumption could be further reduced. The power consumption in transmit mode is minimized to 38 mW, which is the lowest one of previous reported line drivers fabricated in a comparable technology.

Power-efficient high-frequency integrated circuits and communication systems developed within Cool Silicon cluster project

An overview about research activities in the field of high frequency integrated circuits and communication systems performed within the German cluster project Cool Silicon is given. Cool Silicon is located around Dresden/Silicon Saxony/Germany and features around 50 projects and 100 partners from industry and research institutions, and aims at significantly increasing the energy efficiency of information and communications technologies.