Christophe Muller

Experimental and theoretical study of electrode effects in HfO 2 based RRAM

In this work, the impact of Ti electrodes on the electrical behaviour of HfO2-based RRAM devices is conclusively clarified. To this aim, devices with Pt, TiN and Ti electrodes have been fabricated (see Fig. 1). We first provide several experiments to clearly demonstrate that switching is driven by creation-disruption of a conductive filament. Thus, the role of TiN/Ti electrodes is explained and modeled based on the presence of HfOx interfacial layer underneath the electrode. In addition, Ti is found responsible to activate bipolar switching. Moreover, it strongly reduces forming and switching voltages with respect to Pt-Pt devices. Finally, it positively impacts on retention. To support and interpret our results we provide physico-chemical measurements, electrical characterization, ab-initio calculations and modeling.

Self-consistent physical modeling of set/reset operations in unipolar resistive-switching memories

This Letter deals with a self-consistent physical model for set/reset operations involved in unipolar resistive switching memories integrating a transition metal oxide. In this model, set operation is described in terms of a local electrochemical reduction of the oxide leading to the formation of metallic conductive filaments. Beside, reset operation relies on the thermally assisted destruction of the formed metallic filaments by Joule heating effect. An excellent agreement is demonstrated with numerous published experimental data suggesting that this model can be confidently implemented into circuit simulators for design purpose.

Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories

Emerging non-volatile memories (NVM) based on resistive switching mechanism (RS) such as STT-MRAM, OxRRAM and CBRAM etc., are under intense R&D investigation by both academics and industries. They provide high write/read speed, low power and good endurance (e.g., > 1012) beyond mainstream NVMs, which allow them to be embedded directly with logic units for computing purpose. This integration could increase significantly the power/die area efficiency, and then overcome definitively the power/speed bottlenecks of modern VLSIs. This paper presents firstly a theoretical investigation of synchronous NV logic gates based on RS memories (RS-NVL). Special design techniques and strategies are proposed to optimize the structure according to different resistive characteristics of NVMs. To validate this study, we simulated a non-volatile full-adder (NVFA) with two types of NVMs: STT-MRAM and OxRRAM by using CMOS 40 nm design kit and compact models, which includes related physics and experimental parameters. They show interesting power, speed and area gain compared with synchronized CMOS FA while keeping good reliability.

Robust Compact Model for Bipolar Oxide-Based Resistive Switching Memories

Emerging nonvolatile memories based on resistive switching mechanisms pull intense research and development efforts from both academia and industry. Oxide-based resistive random access memories (OxRAM) gather noteworthy performances, such as fast WRITE/READ speed, low power, high endurance, and large integration density that outperform conventional flash memories. To fully explore new design concepts, such as distributed memory in logic or biomimetic architectures, robust OxRAM compact models must be developed and implemented into electrical simulators to assess performances at a circuit level. In this paper, we propose a physics-based compact model used in electrical simulator for bipolar OxRAM memories. After uncovering the theoretical background and the set of relevant physical parameters, this model is confronted to experimental electrical data. The excellent agreement with these data suggests that this model can be confidently implemented into circuit simulators for design purpose.

Bipolar ReRAM Based non-volatile flip-flops for low-power architectures

Resistive Random Access Memories (ReRAMs) fabricated in the back-end-of-line are a promising breakthrough for including permanent retention mechanisms in embedded systems. This low-cost solution opens the way to advanced power management schemes. In this paper, we propose novel design architecture of a non-volatile flip-flop based on Bipolar ReRAMs (Bi-RNVFF). Compared to state-of-the-art Data-Retention flip-flop (with Balloon latch), the proposed design is 25% smaller due to 6T structure compared to the 8T structure of Data-Retention flip-flop. Moreover, being non-volatile, the proposed architecture exhibits a zero leakage compared to a Data-Retention Flip-Flop, which consumes ~3.2μW in sleep mode (leakage) for a 10K Flip-Flop design implemented in 22nm FDSOI technology. Our simulation results show that Bi-RNVFF is a true alternative for future “Power-on, Power-off” application adding Non-Volatility without significant burdening of the existing architectures.

A highly reliable 3-D integrated SBT ferroelectric capacitor enabling FeRAM scaling

Ferroelectric random access memories (FeRAMs) combine very attractive properties such as low-voltage operation, fast write and nonvolatility. However, unlike Flash memories, FeRAMs are difficult to scale along with the CMOS technology roadmap, mainly because of the decrease of available signal with decreasing cell area. One solution for further scaling is to integrate three-dimensional (3-D) FeCAPs. In this paper, we have integrated a 3-D FeCAP structure in a 0.35-/spl mu/m CMOS technology whereby the effective area of <1 /spl mu/m/sup 2/ single FeCAPs is increased by a factor of almost two. We show that, after optimization of the metal-organic chemical vapor deposition (MOCVD) deposition and post-anneal steps of the Sr/sub 0.8/Bi/sub 2.2/Ta/sub 2/O/sub 9/ (SBT) layer, the sidewall SBT contributes to the polarization Pr, resulting in higher Pr values for 0.81-/spl mu/m/sup 2/ three-dimensional (3-D) capacitors (2Pr/spl ap/15 /spl mu/C/cm/sup 2/) than for 1000 /spl mu/m/sup 2/ 2-D capacitors (2Pr/spl ap/10 /spl mu/C/cm/sup 2/). Moreover, these 3-D capacitors are observed to be fatigue-free and imprint-free up to 10/sup 11/ cycles (5-V square pulses), and extrapolations of retention tests indicate less than 10% Pr loss after ten years at 85/spl deg/C, which shows that sidewall SBT retains the same excellent reliability properties as 2-D capacitors. We demonstrate in this paper that the negative signal-scaling trend can be halted using 3-D FeCAPs. To our knowledge, this paper is the first report on electrical and reliability properties of integrated 3-D FeCAPs, and is a starting point for future development work on densely scaled FeRAMs.

Electrical nanocharacterization of copper tetracyanoquinodimethane layers dedicated to resistive random access memories

The local electrical properties of copper tetracyanoquinodimethane (CuTCNQ)/HfO2/Pt stacks were investigated thanks to conductive-atomic force microscopy (AFM) measurements. Local I-V and I-t spectroscopy evidenced repeatable and reversible bipolar electrical switching (SET and RESET operations) at the nanometer scale beneath the AFM tip. Experimental results suggest that resistive switching is due to the creation/dissolution of conductive filaments bridging the CuTCNQ surface to the AFM tip. A physical model based on the migration of Cu+ ions within a nanogap and the growth of a conductive filament shows an excellent agreement with the experimental results during SET operation achieved at nanoscale.

Phase transition in stoichiometric GaSb thin films: Anomalous density change and phase segregation

The crystallization of stoichiometric GaSb thin films was studied by combined in situ synchrotron techniques and static laser testing. It is demonstrated that upon crystallization, GaSb thin films exhibit an unusual behaviour with increasing thickness and concomitant decreasing mass density while its electrical resistance drops as commonly observed in phase change materials. Furthermore, beyond GaSb amorphous-to-crystalline phase transition, an elemental segregation and a separate crystallization of a pure Sb phase is evidenced.

Ge-doped GaSb thin films with zero mass density change upon crystallization for applications in phase change memories

In order to optimize materials for phase change random access memories (PCRAM), the effect of Ge doping on Ga-Sb alloy crystallization was studied using combined in situ synchrotron x-ray techniques, electrical measurements, and static laser testing. The present data emphasize that the crystallization temperature can be increased up to 390 °C with subsequent higher thermal stability of the amorphous phase; phase segregation is evidenced with GaSb, Sb, and Ge phases that crystallize in a two-step crystallization process. The Ge-doped GaSb films exhibit a larger electrical contrast as compared to undoped GaSb alloy (up to ×100). The optical contrast measured by laser testing is shown to follow the mass density change variations upon crystallization, with a negative contrast (higher value in amorphous state) whatever Ge-doping levels. In situ x-ray reflectivity measurements show that zero mass density change can be achieved by low Ge-doping. Ge-doped GaSb alloys look promising since a phase change material w...

Low-power resistive switching in Au/NiO/Au nanowire arrays

Arrays of vertical nanowires structured in Au/NiO/Au segments with 50 nm diameter are characterized by conductive atomic force microscopy to investigate unipolar resistive switching in NiO at the nanoscale. The switching cycles are characterized by extremely low power consumption down to 1.3 nW, which constitutes a significant improvement in nanowire-based resistive switching memory devices. The trend of the reset current as a function of the set resistance, typical of unipolar memories, is extended to a much wider current range than what is reported in literature, confirming the role of Joule heating in the reset process for very low reset currents.