Christopher S. Blair
National Semiconductor
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Featured researches published by Christopher S. Blair.
bipolar/bicmos circuits and technology meeting | 1992
P. Ratnam; M. Grubisich; B. Mehrotra; Ali A. Iranmanesh; Christopher S. Blair; M. Biswal
The authors describe the effect of the isolation edge profile on the leakage and breakdown characteristics of advanced poly emitter NPN bipolar transistors. It is shown that the isolation edge profile can cause considerable base narrowing and reduction of the Gummel number, thus controlling the collector-emitter breakdown voltage, BV/sub ceo/, and the collector-emitter leakage current, I/sub ceo/. The reduction in BV/sub ceo/ can become severe enough so that the devices cannot operate at the maximum supply voltages used in emitter coupled logic (ECL) and BiCMOS circuits. The vertical scaling of the intrinsic device will be constrained under these circumstances to meet the required circuit breakdown characteristics, compromising device parameters such as beta and the unity gain cutoff frequency. Therefore device isolation can control key device parameters, thus becoming a major limiting factor in the development of high-performance bipolar devices.<<ETX>>
custom integrated circuits conference | 1990
Vida Ilderem; Ali A. Iranmanesh; Alan G. Solheim; L. Lam; Christopher S. Blair; Rajeeva Lahri; Steven M. Leibiger; L. Bouknight; Madan Biswal; Bamdad Bastani
A single poly, 0.8 mu m BiCMOS technology having both high-performance CMOS and 14 GHz ASPECT III n-p-n transistors is described. The advanced features of this BiCMOS technology include a low encroachment, defect-free recessed oxide isolation process, self-aligned integrated well taps for MOS devices, double diffused bipolar process, silicided local interconnect, and four levels of metallization with tungsten plugs. Ring oscillator gate delays of <150 ps BiCMOS, <90 ps CMOS, and<50 ps ECL are obtained with this process. This technology is most applicable to high-performance/high-density standard cell ECL gate array circuits requiring embedded memory.<<ETX>>
bipolar/bicmos circuits and technology meeting | 1996
Christopher S. Blair; T. Luk; J. Darmawan; D. Bien
This paper reports a new 0.5 /spl mu/m BiCMOS technology designed for low voltage 2.5 GHz wireless telecommunications applications. The process utilizes a novel emitter configuration referred to as a three sided emitter which enhances performance by reducing base resistance.
Archive | 1998
Christopher S. Blair; Irfan Saadat
Archive | 1998
Christopher S. Blair
Archive | 1998
Christopher S. Blair
Archive | 1999
Christopher S. Blair; Weidong Chen
Archive | 1990
Alan G. Solheim; Bamdad Bastani; James L Bouknight; George E. Ganschow; Bancherd Delong; Rajeeva Lahri; Steve M Leibiger; Christopher S. Blair; Rick C. Jerome; Madan Biswal; Tad Davies; Vida Ilderem; Ali A. Iranmanesh
Archive | 1991
Bancherd Delong; Christopher S. Blair; George E. Ganschow; Thomas Scott Crabb
Archive | 1991
Alan G. Solheim; Bamdad Bastami; James L Bouknight; George E. Ganschow; Bancherd Delong; Rajeeva Lahri; Steve M Leibiger; Christopher S. Blair; Rick C. Jerome; Madan Biswal; Tad Davies; Vida Ilderem; Ali A. Iranmanesh