Craig E. Green

Fluid-to-Fluid Spot-to-Spreader (F2/S2) Hybrid Heat Sink for Integrated Chip-Level and Hot Spot-Level Thermal Management

An innovative heat sink design aimed at meeting both the hot spot and large background heat flux requirements of next generation integrated circuits is presented. The heat sink design utilizes two separate unmixed fluids to meet the cooling requirements of the chip with one fluid acting as a fluidic spreader dedicated to cooling the hot spots only while the second fluid serves as both a coolant for the background heat fluxes and an on-chip regenerator for the hot spot fluid. In this paper the conceptual heat sink design is presented and its theoretical capabilities are explored through optimization calculations and computational fluid dynamics simulations. It has been shown that through close coupling of the two thermal fluids the proposed hybrid heat sink can theoretically remove hot spot heat fluxes on the order of 1 kW/cm 2 and background heat fluxes up to 100 W/cm 2 in one compact and efficient package. Additionally it has been shown that the F2/S2 design can handle these thermal loads with a relatively small pressure drop penalty, within the realm of existing micropump technologies. Finally the feasibility of the F2/S2 design was demonstrated experimentally by modifying a commercially available, air-cooled aluminum heat sink to accommodate an integrated hot spot cooling system and fluidic spreader. The results of these experiments, where the prototype heat sink was able to remove hot spot heat fluxes of up to 365 W/cm 2 and background heat fluxes of up to 20 W/cm 2 , are reported.

A Review of Two-Phase Forced Cooling in Three-Dimensional Stacked Electronics: Technology Integration

Three-dimensional (3D) stacked electronics present significant advantages from an electrical design perspective, ranging from shorter interconnect lengths to enabling heterogeneous integration. However, multitier stacking exacerbates an already difficult thermal problem. Localized hotspots within individual tiers can provide an additional challenge when the high heat flux region is buried within the stack. Numerous investigations have been launched in the previous decade seeking to develop cooling solutions that can be integrated within the 3D stack, allowing the cooling to scale with the number of tiers in the system. Two-phase cooling is of particular interest, because the associated reduced flow rates may allow reduction in pumping power, and the saturated temperature condition of the coolant may offer enhanced device temperature uniformity. This paper presents a review of the advances in two-phase forced cooling in the past decade, with a focus on the challenges of integrating the technology in high heat flux 3D systems. A holistic approach is applied, considering not only the thermal performance of standalone cooling strategies but also coolant selection, fluidic routing, packaging, and system reliability. Finally, a cohesive approach to thermal design of an evaporative cooling based heat sink developed by the authors is presented, taking into account all of the integration considerations discussed previously. The thermal design seeks to achieve the dissipation of very large (in excess of 500 W/cm2) background heat fluxes over a large 1 cm × 1 cm chip area, as well as extreme (in excess of 2 kW/cm2) hotspot heat fluxes over small 200 μm × 200 μm areas, employing a hybrid design strategy that combines a micropin–fin heat sink for background cooling as well as localized, ultrathin microgaps for hotspot cooling.

Two-Phase Convective Cooling for Ultrahigh Power Dissipation in Microprocessors

We present results of modeling for the design of microgaps for the removal of high heat fluxes via a strategy of high mass flux, high quality, and two-phase forced convection. Modeling includes (1) thermodynamic analysis to obtain performance trends across a wide range of candidate coolants, (2) evaluation of worst-case pressure drop due to contraction and expansion in inlet/outlet manifolds, and (3) 1D reduced-order simulations to obtain realistic estimates of different contributions to the pressure drops. The main result is the identification of a general trend of improved heat transfer performance at higher system pressure.

Two phase convective cooling for ultra-high power dissipation in microprocessors

We present results of modeling for the design of microgaps for the removal of high heat fluxes, i.e., 1 kW/cm2, at low wall temperature (~ 85°C) via a strategy of very high mass flux (>1000 kg/m2s), high quality (outlet vapor mass quality >90%), two-phase forced convection. Modeling includes (1) thermodynamic analysis to obtain performance trends across a wide range of candidate coolants, (2) evaluation of worst-case pressure drop due to contraction and expansion in inlet/outlet manifolds, and (3) 1-D reduced order simulations to obtain realistic estimates of different contributions to the pressure drops. The main result is the identification of a general trend of improved heat transfer performance at higher system pressure at the cost of reduced achievable system efficiency (COP), with important implications for coolant selection and system design.

Scaling Analysis of Performance Tradeoffs in Electronics Cooling

Using the governing equations for internal fluid flow and heat transfer, scaling laws are developed to predict how the selection of a liquid or gas coolant and geometry affects the pumping power and volume requirements of heat sinks in electronics cooling applications. One of the principal outcomes of the presented scaling analysis is derivation, based on first principles, of new figure-of-merit parameters that can be used to evaluate cooling performance and guide efforts on development of new cooling fluids. The new figures-of-merits are critically compared to existing performance metrics and experimental data from the literature to emphasize the relevance and accuracy of developed scaling laws.

3D IC With Embedded Microfluidic Cooling: Technology, Thermal Performance, and Electrical Implications

In this paper, a novel thermal testbed with an embedded micropin-fin heat sink is designed and fabricated. The micropin-fin array has a nominal height of 200 μm and a diameter of 90 μm. Single phase and two phase thermal testing of the micropin-fin array heat sink are performed using deionized (D.I.) water as the coolant below atmospheric pressure. The measured pressure drop is as high as 100 kPa with a mass flux of 1637 kg/m2s at a heat flux of 400 W/cm2 in a two-phase regime. The heat transfer coefficient and the vapor quality are calculated and reported. The impact of microfluidic cooling on the electrical performance of the 3D interconnects is also analyzed. The high aspect ratio through silicon vias (TSVs) used in the electrical analysis have a nominal diameter of 10 μm.© 2015 ASME

Time scale matching of dynamically operated devices using composite thermal capacitors

A new thermal management solution is proposed to maximize the performance of electronics devices with dynamically managed power profiles. To mitigate the non-uniformities in chip temperature profiles resulting from the dynamic power maps, solid-liquid phase change materials (PCMs) with an embedded heat spreader network are strategically positioned near localized hotspots, resulting in a large increase in the local thermal capacitance in these problematic areas. The resulting device, called composite thermal capacitor (CTC), can theoretically produce an up-to-twenty-fold increase in the time that a thermally constrained high heat flux device can operate before a power gating or core migration event is required. A prototype CTC that monolithically integrates micro heaters, PCMs and a spreader matrix into a Si test chip was fabricated and experimentally tested to validate the efficacy of the concept and to gain an insight into phase change heat transfer in a spatially-confined environment on the microscale. As the most significant result, an increase in allowable device operating times by over 7x has been experimentally demonstrated, while operating a device at heat fluxes approaching 400W/cm^2.

Integrated Circuit Cooling Using Heterogeneous Micropin-Fin Arrays for Nonuniform Power Maps

As microelectronic system density continues to increase, cooling with conventional technologies continues to become more challenging and is often a limiter of performance and efficiency. The challenge arises due to both large heat fluxes generated across entire chips and packages, and localized hotspots with even higher heat flux. In this paper, nonuniform micropin-fin heat sinks are investigated for the cooling of integrated circuits with nonuniform power maps. Four heterogeneous micropin-fin samples were fabricated and tested in single-phase experiments with deionized water to investigate the effectiveness of local micropin-fin clustering for the cooling of hotspots. Cylindrical and hydrofoil micropin-fins were tested, as well as two types of heterogeneous arrays: those with pin-fins clustered directly over the hotspot and those with the high density cluster spanning the entire width of the channel to prevent flow bypass around the cluster. Samples were tested with a uniform nominal heat flux of 250 W/cm2 as well as a hotspot heat flux of 500 W/cm2. Local micropin-fin clustering was found to be an effective method of reducing local thermal resistance with a modest pressure drop penalty.

Flow boiling of R245fa in a microgap with integrated staggered pin fins

We present an experimental study of two phase flow of refrigerant R245fa in a pin fin enhanced microgap for a range of heat fluxes between 151 W/cm2 to 326 W/cm2. The gap has a base surface area of 1cm × 1cm and height of 200 μm. An array of hydrofoil shaped pin fins covers from bottom to top of the microgap. The pin fins have chord length, longitudinal pitch, and transversal pitch of 75μm, 450μm and 225μm, respectively. On the back side of the chip, four platinum heaters are fabricated and electrically powered in series to enable two phase flow in the microgap, which was part of a pumped flow loop. Heater and surface temperature data were obtained versus heat flux dissipated. Flow visualization was performed using a high speed camera in the heat flux range from 151 W/cm2 to 326 W/cm2. The amount of heat loss across the test section is also provided.

Combined finned microgap with dedicated extreme-microgap hotspot flow for high performance thermal management

There are a number of emerging electronic applications that are thermally limited and may exhibit high overall power dissipation (“background”) combined with local very high power fluxes (“hotspot”). We have batch fabricated a microfluidic heat sink specifically designed to address both levels of heat removal. A microgap for hotspot cooling and micropin-fins are sequentially deep etched in a silicon substrate. The combined microfluidic heat sink is sealed by bonding another layer of silicon to the substrate. The coolant is injected into the combined heat sink from two distinct ports to dissipate the generated heat by micro-heaters. These micro-heaters emulate hotspot and background heat generation by active circuits as well as enable chip junction temperature measurement. Mechanical modeling is conducted to verify the reliability of the design and assess limits on the operating pressure of the fabricated system.