David H. Seo

A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5−x/TaO2−x bilayer structures

Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaO(x)-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 10(12). Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.

Reproducible resistance switching in polycrystalline NiO films

Negative resistance behavior and reproducible resistance switching were found in polycrystalline NiO films deposited by dc magnetron reactive sputtering methods. Oxygen to argon gas ratio during deposition was critical in deciding the detailed switching characteristics of either bi-stable memory switching or mono-stable threshold switching. Both metallic nickel defects and nickel vacancies influenced the negative resistance and the switching characteristics. We obtained a distribution of low resistance values which were dependent on the compliance current of high-to-low resistance switching. At 200°C, the low-resistance state kept its initial resistance value while the high-resistance state reached 85% of its initial resistance value after 5×105s. We suggested that the negative resistance and the switching mechanism could be described by electron conduction related to metallic nickel defect states existing in deep levels and by small-polaron hole hopping conduction.

Graphene Barristor, a Triode Device with a Gate-Controlled Schottky Barrier

Updating the Triode with Graphene In early electronics, the triode—a vacuum device that combined a diode and an electrical grid—was used to control and amplify signals, but was replaced in most applications by solid-state silicon electronics. One characteristic of silicon-metal interfaces is that the Schottky barrier created—which acts as a diode—does not change with the work function of the metal—the Fermi level is pinned by the presence of surface states. Yang et al. (p. 1140, published online 17 May) now show that for a graphene-silicon interface, Fermi-level pinning can be overcome and a triode-type device with a variable barrier, a “barristor,” can be made and used to create devices such as inverters. The absence of defects and surface oxides at a graphene/silicon interface enables voltage control of graphene devices. Despite several years of research into graphene electronics, sufficient on/off current ratio Ion/Ioff in graphene transistors with conventional device structures has been impossible to obtain. We report on a three-terminal active device, a graphene variable-barrier “barristor” (GB), in which the key is an atomically sharp interface between graphene and hydrogenated silicon. Large modulation on the device current (on/off ratio of 105) is achieved by adjusting the gate voltage to control the graphene-silicon Schottky barrier. The absence of Fermi-level pinning at the interface allows the barrier’s height to be tuned to 0.2 electron volt by adjusting graphene’s work function, which results in large shifts of diode threshold voltages. Fabricating GBs on respective 150-mm wafers and combining complementary p- and n-type GBs, we demonstrate inverter and half-adder logic circuits.

Electrical manipulation of nanofilaments in transition-metal oxides for resistance-based memory.

The fabrication of controlled nanostructures such as quantum dots, nanotubes, nanowires, and nanopillars has progressed rapidly over the past 10 years. However, both bottom-up and top-down methods to integrate the nanostructures are met with several challenges. For practical applications with the high level of the integration, an approach that can fabricate the required structures locally is desirable. In addition, the electrical signal to construct and control the nanostructures can provide significant advantages toward the stability and ordering. Through experiments on the negative resistance switching phenomenon in Pt-NiO-Pt structures, we have fabricated nanofilament channels that can be electrically connected or disconnected. Various analyses indicate that the nanofilaments are made of nickel and are formed at the grain boundaries. The scaling behaviors of the nickel nanofilaments were closely examined, with respect to the switching time, power, and resistance. In particular, the 100 nm x 100 nm cell was switchable on the nanosecond scale, making them ideal for the basis for high-speed, high-density, nonvolatile memory applications.

Conductivity switching characteristics and reset currents in NiO films

Conductivity switching phenomena controlled by external voltages have been investigated for various NiO films deposited by dc reactive sputtering methods. Pt∕NiO∕Pt capacitor structures with top electrodes of different diameters have showed increasing off-state current with the diameter of a top electrode and nearly the same on-state current independent of the diameter. Local conductivity switching behaviors have been observed in a series structure consisting of two Pt∕NiO∕Pt capacitors with different resistance values. By reasoning out conductivity switching mechanisms from the switching characteristics and introducing multilayers consisting of NiO layers with different resistance values, we have reduced the reset current by two orders of magnitude.

Robust bi-stable memory operation in single-layer graphene ferroelectric memory

With the motivation of realizing an all graphene-based circuit for low power, we present a reliable nonvolatile graphene memory device, single-layer graphene (SLG) ferroelectric field-effect transistor (FFET). We demonstrate that exfoliated single-layer graphene can be optically visible on a ferroelectric lead-zirconate-titanate (PZT) substrate and observe a large memory window that is nearly equivalent to the hysteresis of the PZT at low operating voltages in a graphene FFET. In comparison to exfoliated graphene, FFETs fabricated with chemical vapor deposited (CVD) graphene exhibit enhanced stability through a bi-stable current state operation with long retention time. In addition, we suggest that the trapping/de-trapping of charge carriers in the interface states is responsible for the anti-hysteresis behavior in graphene FFET on PZT. V C 2011 American Institute of Physics. [doi:10.1063/1.3619816] Graphene is considered to be an exceptional material with high potential for future electronics, owing to its excellent electronic properties; 1 linear electron energy dispersion, and high room temperature mobility. If feasible, an all graphene-based circuit, including logic, analog, and memory devices, would be of great interest to further extend the performance of current Si-based electronics. Among various device applications, graphene based memory structures are still in their infancy in comparison to its logic and analog applications. To date, graphene memory has been demonstrated through chemical modification, 2 filament-type memristor, 3 nanomechanical switch, 4 and graphene FFETs. 5‐7 In graphene FFETs, however, the ambipolar conduction leads to undesirable on/off states for memory applications. Moreover, the absence of an electronic bandgap and controlled doping makes it difficult to resolve such issues. Therefore, a systematic study of graphene FFET is beneficial to realize graphene-based memory structures. In this Letter, we investigate graphene/PZT FFET structures using exfoliated- and CVD-SLG and their mechanism of operation. We show that exfoliated SLG can be optically identified on a PZT substrate and exhibit a hysteresis of the Vshaped conductance with a large memory window at low operating gate voltages. We compare exfoliated- with CVDSLG FFETs and show that devices made of CVD-SLG exhibit a robust bi-stable current state with a long retention time. In order to construct the SLG FFET, we first engineered a ferroelectric substrate to identify SLG. Previously, we have demonstrated that SLG is invisible under the optical micro

Nonmonotonic temperature dependent transport in graphene grown by chemical vapor deposition

Temperature-dependent resistivity of graphene grown by chemical vapor deposition (CVD) is investigated. We observe in low mobility CVD graphene device a strong insulating behavior at low temperatures and a metallic behavior at high temperatures manifesting a non-monotonic in the temperature dependent resistivity.This feature is strongly affected by carrier density modulation. To understand this anomalous temperature dependence, we introduce thermal activation of charge carriers in electron-hole puddles induced by randomly distributed charged impurities. Observed temperature evolution of resistivity is then understood from the competition among thermal activation of charge carriers, temperature-dependent screening and phonon scattering effects. Our results imply that the transport property of transferred CVD-grown graphene is strongly influenced by the details of the environment

Suspended few-layer graphene beam electromechanical switch with abrupt on-off characteristics and minimal leakage current

Suspended few-layer graphene beam electro-mechanical switches (SGSs) with 0.15 μm air-gap are fabricated and electrically characterized. The SGS shows an abrupt on/off current characteristics with minimal off current. In conjunction with the narrow air-gap, the outstanding mechanical properties of graphene enable the mechanical switch to operate at a very low pull-in voltage (VPI) of 1.85 V, which is compatible with conventional complimentary metal-oxide-semiconductor (CMOS) circuit requirements. In addition, we show that the pull-in voltage exhibits an inverse dependence on the beam length.

A plasma-treated chalcogenide switch device for stackable scalable 3D nanoscale memory

Stackable select devices such as the oxide p-n junction diode and the Schottky diode (one-way switch) have been proposed for non-volatile unipolar resistive switching devices; however, bidirectional select devices (or two-way switch) need to be developed for bipolar resistive switching devices. Here we report on a fully stackable switching device that solves several problems including current density, temperature stability, cycling endurance and cycle distribution. We demonstrate that the threshold switching device based on As-Ge-Te-Si material significantly improves cycling endurance performance by reactive nitrogen deposition and nitrogen plasma hardening. Formation of the thin Si₃N₄ glass layer by the plasma treatment retards tellurium diffusion during cycling. Scalability of threshold switching devices is measured down to 30 nm scale with extremely fast switching speed of ~2 ns.

Graphene for true Ohmic contact at metal-semiconductor junctions.

The rectifying Schottky characteristics of the metal-semiconductor junction with high contact resistance have been a serious issue in modern electronic devices. Herein, we demonstrated the conversion of the Schottky nature of the Ni-Si junction, one of the most commonly used metal-semiconductor junctions, into an Ohmic contact with low contact resistance by inserting a single layer of graphene. The contact resistance achieved from the junction incorporating graphene was about 10(-8) ~ 10(-9) Ω cm(2) at a Si doping concentration of 10(17) cm(-3).